Dear All
I use GPIO39 as common output port.
Here my code:
// MOT2_ENA3 = 1; //if I actvate this line then MOT2_ENA3 is '1'. without this line MOT2_ENA3 stay '0'
if (SysPar.ui16FunctionBlockEnable & BIT_MOTOR_DISABLE)
{
MotDisablePwm(1);
return;
}
MOT2_ENA1 = 1;
MOT2_ENA2 = 1;
MOT2_ENA3 = 1;
MOT2_ENA4 = 1;
MotPwmSetPh3A(EPwm1Regs.TBPRD >> 1);
MotPwmSetPh3B(EPwm1Regs.TBPRD >> 1);
MotPwmSetPh4A(EPwm1Regs.TBPRD >> 1);
MotPwmSetPh4B(EPwm1Regs.TBPRD >> 1);
EALLOW;
GpioCtrlRegs.GPAMUX1.all |= 0x00005500; //Enable PWM3,4
EDIS;
Ui16MotEnable[1] = 1;
Here the definition's:
#define MOT2_ENA4 GpioDataRegs.GPBDAT.bit.GPIO44
#define MOT2_ENA3 GpioDataRegs.GPBDAT.bit.GPIO39
#define MOT2_ENA2 GpioDataRegs.GPADAT.bit.GPIO26
#define MOT2_ENA1 GpioDataRegs.GPBDAT.bit.GPIO43
Here the initialistion of these ports (Inside EALLOW and EDIS)
GpioCtrlRegs.GPBDIR.all = 0x0000; // GPIO32-GPIO63 are inputs
GpioCtrlRegs.GPBDIR.bit.GPIO34 = 1; //VREF_SPM2
GpioCtrlRegs.GPBDIR.bit.GPIO39 = 1; //MOT2_ENA3
GpioCtrlRegs.GPBDIR.bit.GPIO43 = 1; //MOT2_ENA1
GpioCtrlRegs.GPBDIR.bit.GPIO44 = 1; //MOT2_ENA4
Problem: GPIO34,43,44 are working well. GPIO39 is only '1' if I activate the first line of my code. (return (Line 2 -6) is not used in all cases of my test program.)
It seems to me the CPU need 2 times the same GPIO39-->'1' order. I also can set the port with emulator after execution of this program, and then it works also after setting with emulator (And we are sure no other process is disturbing). Or I execute GPIO39-->'1' order before or after this small program in the code. Then also it is working. Imortant is 2 times same GPIO39-->'1' order.
The output of port correspondent with the watch window of GpioDataRegs.GPBDAT register.
I checked also different settings compiler optimation. No difference in result.
Compiler: CCS 5.5.0.0077 Ti v6.2.5
I use a very small test SW with only this functionality.
Assembly code of ASM File (without any optimation)
;----------------------------------------------------------------------
; 299 | if (SysPar.ui16FunctionBlockEnable & BIT_MOTOR_DISABLE)
;----------------------------------------------------------------------
MOVW DP,#_SysPar+3 ; [CPU_U]
TBIT @_SysPar+3,#0 ; [CPU_] |299|
BF $C$L9,NTC ; [CPU_] |299|
; branchcc occurs ; [] |299|
.dwpsn file "C:/Eigene_Dateien_D/projekte/SmartOptionII/Software/Sandbox/source/motor_pwm.c",line 301,column 7,is_stmt
;----------------------------------------------------------------------
; 301 | MotDisablePwm(1);
;----------------------------------------------------------------------
MOVB AL,#1 ; [CPU_] |301|
$C$DW$41 .dwtag DW_TAG_TI_branch
.dwattr $C$DW$41, DW_AT_low_pc(0x00)
.dwattr $C$DW$41, DW_AT_name("_MotDisablePwm")
.dwattr $C$DW$41, DW_AT_TI_call
LCR #_MotDisablePwm ; [CPU_] |301|
; call occurs [#_MotDisablePwm] ; [] |301|
.dwpsn file "C:/Eigene_Dateien_D/projekte/SmartOptionII/Software/Sandbox/source/motor_pwm.c",line 302,column 7,is_stmt
;----------------------------------------------------------------------
; 302 | return;
;----------------------------------------------------------------------
B $C$L10,UNC ; [CPU_] |302|
; branch occurs ; [] |302|
$C$L9:
.dwpsn file "C:/Eigene_Dateien_D/projekte/SmartOptionII/Software/Sandbox/source/motor_pwm.c",line 304,column 6,is_stmt
;----------------------------------------------------------------------
; 304 | MOT2_ENA1 = 1;
;----------------------------------------------------------------------
MOVW DP,#_GpioDataRegs+8 ; [CPU_U]
OR @_GpioDataRegs+8,#0x0800 ; [CPU_] |304|
.dwpsn file "C:/Eigene_Dateien_D/projekte/SmartOptionII/Software/Sandbox/source/motor_pwm.c",line 305,column 6,is_stmt
;----------------------------------------------------------------------
; 305 | MOT2_ENA2 = 1;
;----------------------------------------------------------------------
OR @_GpioDataRegs+1,#0x0400 ; [CPU_] |305|
.dwpsn file "C:/Eigene_Dateien_D/projekte/SmartOptionII/Software/Sandbox/source/motor_pwm.c",line 306,column 6,is_stmt
;----------------------------------------------------------------------
; 306 | MOT2_ENA3 = 1;
;----------------------------------------------------------------------
OR @_GpioDataRegs+8,#0x0080 ; [CPU_] |306|
.dwpsn file "C:/Eigene_Dateien_D/projekte/SmartOptionII/Software/Sandbox/source/motor_pwm.c",line 307,column 6,is_stmt
;----------------------------------------------------------------------
; 307 | MOT2_ENA4 = 1;
;----------------------------------------------------------------------
OR @_GpioDataRegs+8,#0x1000 ; [CPU_] |307|
.dwpsn file "C:/Eigene_Dateien_D/projekte/SmartOptionII/Software/Sandbox/source/motor_pwm.c",line 308,column 6,is_stmt
;----------------------------------------------------------------------
; 308 | MotPwmSetPh3A(EPwm1Regs.TBPRD >> 1);
;----------------------------------------------------------------------
MOVW DP,#_EPwm1Regs+5 ; [CPU_U]
MOV AL,@_EPwm1Regs+5 ; [CPU_] |308|
MOVW DP,#_EPwm3Regs+9 ; [CPU_U]
LSR AL,1 ; [CPU_] |308|
MOV @_EPwm3Regs+9,AL ; [CPU_] |308|
.dwpsn file "C:/Eigene_Dateien_D/projekte/SmartOptionII/Software/Sandbox/source/motor_pwm.c",line 309,column 6,is_stmt
;----------------------------------------------------------------------
; 309 | MotPwmSetPh3B(EPwm1Regs.TBPRD >> 1);
;----------------------------------------------------------------------
Where is the problem?
Best regards and thank you for any ideas.
Franz
