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I2C FIFO Not Resetting

Other Parts Discussed in Thread: LAUNCHXL-F28069M

Hi there,

I'm trying to use I2C to communicate between two LAUNCHXL-F28069M's. In my test project I do a whole bunch of "writes" from the master board to the slave board, and then a whole bunch of "reads" (I'm not using multi-master mode). I'm sending the four bytes over each time using the FIFO.

For some reason at the very beginning of the "read" step, the bytes I send are getting scrambled somehow. I reset the TX FIFO on the slave each time I get a read request. The bytes I send are 0x0F, 0xDC, 0x40, 0x49 in that order.

Here is a screenshot showing the scrambled bytes. Here is one without annotations.

The weirdest thing is that this only happens on the first read after doing a bunch of writes, and it only happens about 10% of the time on the first read after a bunch of writes.

Does anyone know why this might be happening?

EDIT
On the master side I check ARDY and XRDY before sending anything