Hi to all,
i'm having doubts about the eCan example ($TI Release: F2806x C/C++ Header Files and Peripheral Examples V141 $ $Release Date: January 19, 2015 $).
By looking the SysCtrl.c file, the device is set to 90Mhz SYSCLKOUT and the DIVSEL is set to 2. But in the eCan example the Bit Rate is set to 1Mbps for a 80 MHz SYSCLKOUT (???) with the next values:
40 MHz CAN module clock Bit rate = 1 Mbps //Note
ECanaShadow.CANBTC.bit.BRPREG = 1;
ECanaShadow.CANBTC.bit.TSEG2REG = 4;
ECanaShadow.CANBTC.bit.TSEG1REG = 13;
I'm guessing this values are incorrect, in any case the CAN module clock will be at 45Mhz (SYSCLOKOUT/2). Is this correct?
Regards
Gastón