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epwm soc F28M35H52C

I'm pulling code from the epwm_adc_soc  example in to the project I'm working on and can't seem to get the pwm soc to trigger the adc.

I have an ADC interrupt enabled and I know that the interrupt and the ISR is working because if I software force an adc soc I can hit a breakpoint in my ISR. So it seems that the epwm is not triggering the soc properly or the adc is not setup properly for epwm soc. I'm trying to trigger SOCA from epwm7 CMPC value.

Here's my ADC and EPWM code.

EALLOW;

//ADC control and interrupt

Adc1Regs.ADCCTL2.bit.ADCNONOVERLAP = 1; // Set ADC to non-overlap mode

Adc1Regs.ADCCTL1.bit.INTPULSEPOS = 1; // EOC trips after conversion result is latched

Adc1Regs.INTSEL1N2.bit.INT1E = 1; // Enabled ADCINT1

Adc1Regs.INTSEL1N2.bit.INT1CONT = 0; // Disable ADCINT1 Continuous mode (must clear ADCINT1 flag before next int can occur)

Adc1Regs.INTSEL1N2.bit.INT1SEL = 1; // setup EOC1 to trigger ADCINT1

// Selecing triggers for SOCs

AnalogSysctrlRegs.TRIG5SEL.bit.TRIG5SEL = 23; // Assigning EPWM7SOCA to TRIGGER 5 of analog subsystem

Adc1Regs.ADCSOC0CTL.bit.TRIGSEL = 9; // Assign TRIGGER 5 to SOC0 TRIGSEL

// set the channels for each adc

Adc1Regs.ADCSOC0CTL.bit.CHSEL = 0x06; // ADC1-A6

// set the acquisition time for the sample & hold window.

Adc1Regs.ADCSOC0CTL.bit.ACQPS = 0x0B; // sample window is 12 cycles long (minimum value is 0x06 - 7 cycles)

EDIS;

EALLOW;

//set up SOC

// Enable SOCA and SOCB

EPwm7Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group

//EPwm7Regs.ETSEL.bit.SOCBEN = 1; // Enable SOC on B group

EPwm7Regs.ETSEL.bit.SOCASEL = 0x4; // Select SOC from CMPA/CMPC on up count

//EPwm7Regs.ETSEL.bit.SOCBSEL = 0x6; // Select SOC from CMPB/CMPD on up count

EPwm7Regs.ETSEL.bit.SOCASELCMP = 0x1; // use CMPC value for A event trigger

//EPwm7Regs.ETSEL.bit.SOCBSELCMP = 0x1; // use CMPD value for B event trigger

EPwm7Regs.ETPS.bit.SOCAPRD = 3; // Generate SOCA pulse on every 3rd event

//EPwm7Regs.ETPS.bit.SOCBPRD = 3; // Generate SOCB pulse on every 3rd event

EPwm7Regs.CMPC = TBPRD_400KHZ*0.2; //SOC event A at 20% of prd

EPwm7Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // Enable Sync Out

EPwm7Regs.TBPRD = TBPRD_400KHZ; // Set EPWM timer period

EPwm7Regs.TBPHS.half.TBPHS = 0; // Time-Base Phase Register

EPwm7Regs.TBCTR = 0; // Time-Base Counter Register

EPwm7Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE; // Set Immediate load

EPwm7Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count-up mode: used for asymmetric PWM

EPwm7Regs.TBCTL.bit.PHSEN = TB_ENABLE; // Enable phase loading for sync

EPwm7Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // TBCLK = SYSCLKOUT

EPwm7Regs.TBCTL.bit.CLKDIV = TB_DIV1;

EPwm7Regs.AQCTLA.bit.ZRO = AQ_CLEAR; //set low when counter is zero

EPwm7Regs.AQCTLB.bit.ZRO = AQ_CLEAR; //set low when counter is zero

EDIS;

One thing I'm confused about from the example code is the GPIO set up. It says it is selecting GPIO32 as EPWM1SOCA as driving source, but GPIO32 is ADCSOCAO pin. It seems like you would want to enable this if you wanted to force a soc from a GPIO trigger. To get EPWM as the driving source you don't need to change any GPIO, you just need to set up the EPWM correctly right? This is the GPIO code I'm referring to.

EALLOW;

GpioG1CtrlRegs.GPBDIR.bit.GPIO32 = 1; // Set as output

GpioG1CtrlRegs.GPBMUX1.bit.GPIO32 = 3; // Select EPWM1SOCA as driving source

GpioG1CtrlRegs.GPBDIR.bit.GPIO33 = 1; // Set as output

GpioG1CtrlRegs.GPBMUX1.bit.GPIO33 = 3; // Select EPWM1SOCB as driving source

EDIS;

 

 

  • Hi rs,

    You are configuring the trigger select for ADC1 for SOC0 to be triggered by the ePWM. However, the interrupt flag is triggered by EOC1, not EOC0:

    Adc1Regs.INTSEL1N2.bit.INT1SEL = 1; // setup EOC1 to trigger ADCINT1

    Since the trigger isn't configured for SOC1, EOC1 won't occur based on the ePWM event. It could, however, be possible to software force EOC1 which would then result in an interrupt.

    If you want the ePWM event to trigger both SOC0 and SOC1, then configure the trigger for both SOCs.
  • That's it. Thanks!