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can receive interrupt setup

evs
Genius 5910 points

I like to receive an interrupt when I receive a can message. I see that the is a message is received and there is a interrupt request CANGIF0.GMIF0 and CANGIF0.MIV data. But after that, there is no PIE FR interrupt request. So between the CAN and PIE(FR Flag)  the request is lost. I can't find how that is done or which bit i'm missing.
Any suggestion?

This is my code:


void ECAN_enableINT (HAL_Handle handle)
{
     PIE_Obj *pie = (PIE_Obj *)handle->pieHandle;
     EALLOW;
     PIE_enable (pie);  // Enable the PIE block
     pie->ECANAINT0  = &CANint;
    CANOBJ.ECanaRegs->CANMIL.all = 0x0;  //The mailbox interrupt is generated on interrupt line 0.
    CANOBJ.ECanaRegs->CANGIM.all=0x01;  // Set CANINT0
    CANOBJ.ECanaRegs->CANMIM.all=0X7FF; // Enable mailboxes for int
    pie->PIEIER_PIEIFR[9].IER |= (1 << 5);  // PIE Group 9, INT5 CANI0
    unsigned x=IER ;                     // Enable CPU INT
    x|= 0x100;
    IER=x;
    EDIS;
    EINT;
}

Thanks!

  • 0
    TI__Guru* 93985 points

    Hello,

      Could you please look at the examples in App.note SPRA876 (you can download this from the TI website http://www.ti.com/lit/an/spra876a/spra876a.pdf ). There are a few examples that show how interrupts are configured. For example, you could look at MULTINT project. Also, please ensure your writes are going through correctly, using the watch window of CCS. Also suggest commenting out EDIS until you are able to figure this out. Often times, EALLOW is not active when it needs to be..

  • 0 in reply to Hareesh Janakiraman
    Genius 5910 points

    Hi,

    I spend days at looking at the documentation. I got a working PIE-controller. Because other peripherals are using it. When A CAN message is received CANGIF0(MIV0=2, GMIF=1) is filled. So the can-bus is sending a interrupt request:

    As in many examples: the PIE is configured like this:

    PieVectTable.ECAN0INTA = &eCAN0INT_ISR;

    /* Configure PIE interrupts */
    PieCtrlRegs.PIECRTL.bit.ENPIE = 1; // Enable vector fetching from PIE block
    PieCtrlRegs.PIEACK.bit.ACK9 = 1; // Enables PIE to drive a pulse into the CPU
    // The interrupt can be asserted in either of the eCAN interrupt lines


    /* Configure system interrupts */
    IER |= 0x0100; // Enable INT9 of CPU

    See my example code I did the same.

    So:

    1. CANGIF0 is not the CANBUS interrupt request register. and something else also needs to be done.

    2 . something is blocking my interrupt request. other interrupts?

    3 . Something else needs to be done. That is not in the example/documentation CANBUS/PIE section.

    Please give me advice how to debug. this. Can I manually trigger a PIE canbus interrupt request?

    Thanks.

     

  • 0 in reply to evs
    Genius 5910 points
    So what is wrong with this line?
    pie->PIEIER_PIEIFR[9].IER |= (1 << 5); // PIE Group 9, INT5 CANI

    Someone really likes the world to burn to start with INT1 in stead of INT0 in the PIE controller.
    This is correct: pie->PIEIER_PIEIFR[8].IER |= (1 << 4); // PIE Group 9, INT5 CAN
  • 0 in reply to evs
    TI__Guru* 93985 points
    So, did the correction resolve your issue? If so, please close the thread.