dear e2e
we are using Digital pot (TPL0102 Two 256-Taps Digital Potentiometers With Non-Volatile Memory) for one of the project. The DPOT(slave) is communicating b/w lpc2141(master) by using i2c protocol.
we are communicating with the Digital pot with i2c communication protocol at speed of 100khz . We are using the pot in the Voltage Divider Mode .
we are writing a value to IVRA (Initial Value Register for Potentiometer A) register successfully and reading from the register successfully. I am writing register different values( 0 to 255) to the that register , but voltage value not changing in the WA (Wiper terminal of potentiometer A) pin . voltage is always zero at that pin .
i have attached code in the file.
can u tell the reason for this ?l
_irq void i2c_write() { unsigned char status = 0 ; status = I2C0STAT ; status1[s_i++] = status; IOCLR0 |= ( 1 << 25 ); switch(status) { // start condition has been tx , slave add + w will be tx , an ack will be recived case 0x08 : I2C0DAT = 0xAE ; //slave add I2C0CONCLR = 0x20 ; I2C0CONCLR = 0x08 ; //clear the si flag temp_debug = 1; break; //repetated start condition is tx case 0x10 : I2C0CONCLR = 0x08 ; //clear the si flag I2C0CONCLR = 0x20 ; temp_debug = 2 ; break; //slave add+ w has been tx , ack has been recived , send first byte data case 0x18 : I2C0DAT = 0x00 ; // set reg add I2C0CONCLR = 0x08 ; //clear the si flag temp_debug = 3 ; break; // 0x20 :- slave add + w has been tx , NACK recived. send stop bit // 0x30 :- data byte tx , not ack recived // 0x38 :- arbitration lost case 0x20 : case 0x30 : case 0x38 : I2C0CONSET = 0x10; // set STO bit I2C0CONCLR = 0x08 ; //clear the si flag temp_debug = 4 ; break; //data byte is tx , ack is recived . send stop condition case 0x28 : i2c_txcomplete++ ; if( i2c_txcomplete == 1 ) { I2C0DAT = 176 ; // set wiper reg value I2C0CONCLR = 0x08 ; //clear the si flag // ds_i = s_i ; } else { temp_debug = 6 ; I2C0CONSET = 0x10; // set STO bit I2C0CONCLR = 0x08 ; //clear the si flag ds_i = s_i ; } break; } VICVectAddr = 0x0; // Acknowledge that ISR has finished execution }