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F28M35H52C1 PLL input clock source

Hi Champs,

I checked the TRM(1.8.1) which mentioned OSCCLK(external oscillator)  "When used as a clock input to the system PLL, the single-ended clock source should be in the range mentioned in the device data manual".In my understanding, this mean we can use OSCCLK to by PLL input.

However, I check Figure1-11, PLL input resource didn't include MAIN OSC(external oscillator). There also is a paragraph "PLLSYSCLK is either derived from the output of the PLL (when the PLL is enabled and locked) or from the MAIN OSC clock directly (when the PLL is bypassed or turned OFF)". Looks like PLL input resource can't be OSCCLK. Could anyone tell me can we configure OSCCLK to be PLL input clock ? I want to use external oscillator(20Mhz) to replace internal oscillator and be input to PLL. If we can configure external oscillator(OSSCLK) to be PLL input , do we have any example code ? thank you.