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PCB Layout Guidelines for Concerto F28M35x

Other Parts Discussed in Thread: F28M35H52C, TPS7A8300

Hi,

Is there any PCB layout guidelines document available for Concerto F28M35x devices? I was browsing forum on the subject but all I could find were just few old dead URL links. The data sheet for my selected device F28M35H52C also seems to be mostly silent and non-descriptive or perhaps I couldn't find a relevant info in it. Please someone advise.

Michael

  • Hi Mike,

    This is the only design document for C2000 controllers I'm aware of: www.ti.com/.../spraas1c.pdf

    Regards,
    Gautam
  • Thank you, Gautam.

    I'll check it out and try to make the best out of it. But unfortunately the warning on the document's first page clearly says that this document "doesn't apply to F28M3x family of devices" so its recommendations may or may not be valid for Concerto. It's a pity that TI just leaves users in the dark on the subject.

  • Michael,

    We are currently working on a PCB guidelines document, in the mean time please send us your specific question and we will try to answer if for you.

    REgards,
    Peter
  • Peter,

    I can't come up with the specific question now. I'm starting a new project that involves Concerto device and this is first time ever I'll use it. Typically at the beginning of schematic design stage I try to read over schematic and PCB design guidelines and identify potential areas of concern. I intended to do so this time as well but was unable to find anything related to Concerto family. So I'm trying to use and make sense of the schematic and PCB files for F28M35x-based controlCARD but that is obviously more tedious and time-consuming. Could you please suggest any timeline for this document to be available or perhaps would you be able to grant an access to its yet non-official beta version?

    Thank you, Michael

  • sonata_schem_layout_64.zipMichael,

    Our target for the hardware guide (encompassing all latest devices) is end of the year.  In the mean time, see attached schematic and layout files for our internal test platform for this chip. It should give you a good starting point for Power, JTAG, Resets, Clocking, Boot Modes, GPIOs. Please ignore the last page of the schematic as it describes a CPLD that also resides on this board. Once you have a chance to take a look at these files, feel free to come back with any specific questions you might have and I will be glad to answer them for you.

    Regards,

    PEter

  • Peter,

    I think this would be of great help. Thank you!

    Do I understand it right that CPU on this board is placed in the socket that accepts TQFP144 package? Also would it be possible for you to share a schematic BOM and PCB layout file? As far as I can see it the layout is done in Cadence Allegro so having .brd design file would be awesome.

    And also question on power supply section of this board. It seems that U6, U7, and U8 voltage regulators used are probably TPS7A8300 or something similar. Given that they're linear devices their power dissipation might be quite high in this application leading subsequently to the rise of package temperature. Do you have any data regarding their real package temperatures in this application that you might be able to share? Were they selected due to their low noise characteristics or for some other reasons?

    Regards, Michael

  • sonata_data_schem_layout_bom.zipMichael,

    Attached are the BOM and PCB layout file and schematic file  - I am using Pulsonix tool, you can get the viewer free from their website. Regarding power supply, you are correct, I am using TPS7A8300 purely for convenience and reduced part count as the same part can be used to generate 3 voltages.

    Regards,
    PEter

  • Peter,

    Thank you again. As far as TPS7A8300 goes, have you noticed any significant package temperature rise while using them in this application? I certainly don't want to reinvent the wheel and would rather opt for using already proven solution.

    Michael

  • Michael,

    "Significant Package Temperature" is not a very precise term. Let me just say that this LDO was satisfactory for most of our internal testing needs. Depending on how much power is drawn, and the ambient temperature, the LDO can get warm - this also depends on the proper thermal via routing from the thermal pad of the LDO to the ground plane. You should also factor in how much power the MCU will be drawing for your application. This is a 2A LDO, maybe your application does not require that much current. Also, you may want to look at cost.

    Regards,
    Peter
  • Thank you, Peter.