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CCS 6, TMS320C28x and absolute variable addresses

Hi all,

I'm looking for options for locating variables at specific memory address (for external devices mapped via EMIF.) I'm familiar with using a pointer and assigning it the address but I'm looking for something where I can declare a variable and tell the linker where it should be. I found a page at  that describes the LOCATION pragma but that seems not to work with CCS 6 and this processor. I can use the DATA_SECTION pragma and corresponding entry in the linker command file, but I'd really prefer to keep everything in one place and in the C/C++ source if possible. I've searched the compiler manual spru514j.pdf for a way to do this but was unable to find anything.

Is there a pragma or keyword that will locate a variable at an absolute address?

Thanks!

  • Not so fast on the DATA_SECTION pragma apparently. I have the following in my source:

    // SDRAM mapped using CS0 starting at 0x9000 0000
    #pragma SET_DATA_SECTION("_SDRAM_")
    volatile int16 external_sdram[0x1000000];	// 0x9000 0000
    #pragma SET_DATA_SECTION()
    


    In the linker command file

    MEMORY
    {
    	PAGE 0:    /* Program Memory */
       /* flash */
        APPCODE     : origin = 0x088000, length = 0x038000	   /* on-chip FLASH E..N */
    	
    	
    	PAGE 1 :   /* Data Memory */
    
       RAMD0           	: origin = 0x00B000, length = 0x000800
       RAMD1           : origin = 0x00B800, length = 0x000800
    	
    ...
    
    /* from SPRS880G: EMIF1_CS4n - Program + Data 393K <D7> 16 0x0038 0000 0x003D FFFF Yes */
       FPGA             : origin = 0x380000, length = 0x060000			/* start of FPGA */
    /* from SPRS880G: EMIF1_CS0n - Data 256M × 16 0x8000 0000 0x8FFF FFFFF Yes */
       SDRAM             : origin = 0x80000000, length = 0x10000000		/* start of SDRAM */
    }
    

    and

    	_FPGA_ : align(4) > FPGA,      PAGE = 1,
       		//LOAD_END(__PARTITION_END_7)
    			{
    				__PARTITION_TYPE_7 = __PT_DATA + __PF_INIT;
    				__PARTITION_START_7 = .;
    				*(_FPGA_)
    				. = align(4);
    			}
    
    	_SDRAM_ : align(4) > FPGA,      PAGE = 1,
       		//LOAD_END(__PARTITION_END_8)
    			{
    				__PARTITION_TYPE_8 = __PT_DATA + __PF_INIT;
    				__PARTITION_START_8 = .;
    				*(_SDRAM_)
    				. = align(4);
    			}
    

    The FPGA section builds and links w/out difficulty but when it comes to the SDRAM section, I get the following error:

    "C:/path/to/proj/BlinkLEDs/build/BlinkLEDs.cmd", line 125: error #10099-D: program will not fit into available memory.  run placement with alignment/blocking fails for section "_SDRAM_" size 0x1000000 page 1.  Available memory ranges:
       FPGA         size: 0x60000      unused: 0x57fc0      max hole: 0x57fc0   
    error #10010: errors encountered during linking; 

    Length for SDRAM is set to  0x1000 0000 but the error reports 0x100 0000. (Spaces inserted to make counting zeroes easier. ;)

    There must be something I've overlooked but I can't figure that out.

    The FPGA section seems to work as expected.

    Thanks!

  • Hank,

    Shouldn't this line...

    _SDRAM_ : align(4) > FPGA,      PAGE = 1,

    ...be...

    _SDRAM_ : align(4) > SDRAM,      PAGE = 1,

    ...? I think you're mapping everything into the same section.

    Regards,

    Richard
  • Yes - Thanks!

    I thought I was making that kind of mistake but several minutes of staring at the code did not reveal.

    thanks,
    hank