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Help needed in the Custom Bootloader design for F28377D

naveen s
Prodigy 135 points
Other Parts Discussed in Thread: SYSBIOS, CONTROLSUITE

Hi All,

I am using F28377D. I have been working on developing the a customer bootloader (Non - SYSBIOS APP) which boots the main application(SYS-BIOS APP), both are stored in internal flash. Bootloader is stored at 0x80000, my main application is stored at 0x82000. I have compiled both the project, if I flash both the boot loader and the application using the CCS debugger, when I start (play button) in the CCS, bootloader is jumping to the application code. But if i flash and turn off the board, and change boot mode to GETMODE, it is not working, boot loader itself not booting.

Bootloader linker cmd file:


MEMORY
{
PAGE 0 : /* Program Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
/* BEGIN is used for the "boot to Flash" bootloader mode */

BEGIN : origin = 0x080000, length = 0x000002
RAMM0 : origin = 0x000122, length = 0x0002DE
RAMD0 : origin = 0x00B000, length = 0x000800
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800
RAMLS4 : origin = 0x00A000, length = 0x000800
RAMGS14 : origin = 0x01A000, length = 0x001000
RAMGS15 : origin = 0x01B000, length = 0x001000
RESET : origin = 0x3FFFC0, length = 0x000002

/* Flash sectors */
FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASHN : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */

PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */

BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAMD1 : origin = 0x00B800, length = 0x000800

RAMLS5 : origin = 0x00A800, length = 0x000800

RAMGS0 : origin = 0x00C000, length = 0x001000
RAMGS1 : origin = 0x00D000, length = 0x001000
RAMGS2 : origin = 0x00E000, length = 0x001000
RAMGS3 : origin = 0x00F000, length = 0x001000
RAMGS4 : origin = 0x010000, length = 0x001000
RAMGS5 : origin = 0x011000, length = 0x001000
RAMGS6 : origin = 0x012000, length = 0x001000
RAMGS7 : origin = 0x013000, length = 0x001000
RAMGS8 : origin = 0x014000, length = 0x001000
RAMGS9 : origin = 0x015000, length = 0x001000
RAMGS10 : origin = 0x016000, length = 0x001000
RAMGS11 : origin = 0x017000, length = 0x001000
RAMGS12 : origin = 0x018000, length = 0x001000
RAMGS13 : origin = 0x019000, length = 0x001000


CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
}


SECTIONS
{
/* Allocate program areas: */
.cinit : > FLASHA PAGE = 0, ALIGN(4)
.pinit : > FLASHA PAGE = 0, ALIGN(4)
.text : > FLASHA PAGE = 0, ALIGN(4)
codestart : > BEGIN PAGE = 0, ALIGN(4)
ramfuncs : LOAD = FLASHA,
RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)

#ifdef __TI_COMPILER_VERSION
#if __TI_COMPILER_VERSION >= 15009000
.TI.ramfunc : {} LOAD = FLASHE,
RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)
#endif
#endif

/* Allocate uninitalized data sections: */
.stack : > RAMM1 PAGE = 1
.ebss : >> RAMLS5 | RAMGS0 | RAMGS1 PAGE = 1
.esysmem : > RAMLS5 PAGE = 1

/* Initalized sections go in Flash */
.econst : > FLASHA PAGE = 0, ALIGN(4)
.switch : > FLASHA PAGE = 0, ALIGN(4)

.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */

Filter_RegsFile : > RAMGS0, PAGE = 1

SHARERAMGS0 : > RAMGS0, PAGE = 1
SHARERAMGS1 : > RAMGS1, PAGE = 1

/* The following section definitions are required when using the IPC API Drivers */
GROUP : > CPU1TOCPU2RAM, PAGE = 1
{
PUTBUFFER
PUTWRITEIDX
GETREADIDX
}

GROUP : > CPU2TOCPU1RAM, PAGE = 1
{
GETBUFFER : TYPE = DSECT
GETWRITEIDX : TYPE = DSECT
PUTREADIDX : TYPE = DSECT
}

}

Application Linker cmd file:

MEMORY
{
PAGE 0 : /* Program Memory */
/* BEGIN is used for the "boot to FLASH" bootloader mode */

D01SARAM : origin = 0x00B000, length = 0x001000

/* Flash boot address */
BEGIN : origin = 0x082000, length = 0x000002

/* Flash sectors */
/*FLASHA : origin = 0x080002, length = 0x001FFE on-chip Flash */
FLASHB : origin = 0x082002, length = 0x001FFE /* on-chip Flash */
FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASHN : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */
RESET : origin = 0x3FFFC0, length = 0x000002

PAGE 1 : /* Data Memory */

BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom
will use this for
stack */

M01SARAM : origin = 0x000122, length = 0x0006DE /* on-chip RAM */

LS05SARAM : origin = 0x008000, length = 0x003000 /* on-chip RAM */

/* on-chip Global shared RAMs */
RAMGS0 : origin = 0x00C000, length = 0x001000
RAMGS1 : origin = 0x00D000, length = 0x001000
RAMGS2 : origin = 0x00E000, length = 0x001000
RAMGS3 : origin = 0x00F000, length = 0x001000
RAMGS4 : origin = 0x010000, length = 0x001000
RAMGS5 : origin = 0x011000, length = 0x001000
RAMGS6 : origin = 0x012000, length = 0x001000
RAMGS7 : origin = 0x013000, length = 0x001000
RAMGS8 : origin = 0x014000, length = 0x001000
RAMGS9 : origin = 0x015000, length = 0x001000
RAMGS10 : origin = 0x016000, length = 0x001000
RAMGS11 : origin = 0x017000, length = 0x001000
RAMGS12 : origin = 0x018000, length = 0x001000
RAMGS13 : origin = 0x019000, length = 0x001000
RAMGS14 : origin = 0x01A000, length = 0x001000
RAMGS15 : origin = 0x01B000, length = 0x001000

/* Shared MessageRam */
CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
}


SECTIONS
{
/* Allocate program areas: */
.cinit : > FLASHB | FLASHC | FLASHD | FLASHE |
FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |
FLASHK | FLASHL | FLASHM | FLASHN PAGE = 0
.binit : > FLASHB | FLASHC | FLASHD | FLASHE |
FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |
FLASHK | FLASHL | FLASHM | FLASHN PAGE = 0
.pinit : > FLASHB | FLASHC | FLASHD | FLASHE |
FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |
FLASHK | FLASHL | FLASHM | FLASHN PAGE = 0
.text : > FLASHB | FLASHC | FLASHD | FLASHE |
FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |
FLASHK | FLASHL | FLASHM | FLASHN PAGE = 0
codestart : > BEGIN PAGE = 0
ramfuncs : LOAD = FLASHB | FLASHC | FLASHD | FLASHE |
FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |
FLASHK | FLASHL | FLASHM | FLASHN PAGE = 0
RUN = LS05SARAM PAGE = 1
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd)

#ifdef __TI_COMPILER_VERSION
#if __TI_COMPILER_VERSION >= 15009000
.TI.ramfunc : {} LOAD = FLASHB | FLASHC | FLASHD | FLASHE |
FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |
FLASHK | FLASHL | FLASHM | FLASHN PAGE = 0,
RUN = LS05SARAM PAGE = 1,
table(BINIT)
#endif
#endif

/* Allocate uninitalized data sections: */
.stack : > M01SARAM | LS05SARAM PAGE = 1
.ebss : > M01SARAM | LS05SARAM PAGE = 1
.esysmem : > LS05SARAM | M01SARAM PAGE = 1
.cio : > LS05SARAM | M01SARAM PAGE = 1

/* Initalized sections go in Flash */
.econst : > FLASHB | FLASHC | FLASHD | FLASHE |
FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |
FLASHK | FLASHL | FLASHM | FLASHN PAGE = 0
.switch : > FLASHB | FLASHC | FLASHD | FLASHE |
FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |
FLASHK | FLASHL | FLASHM | FLASHN PAGE = 0
.args : > FLASHB | FLASHC | FLASHD | FLASHE |
FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |
FLASHK | FLASHL | FLASHM | FLASHN PAGE = 0

Filter_RegsFile : > RAMGS0 | RAMGS1 | RAMGS2 | RAMGS3 | RAMGS4 |
RAMGS5 | RAMGS6 | RAMGS7 | RAMGS8 | RAMGS9 |
RAMGS10 | RAMGS11 | RAMGS12 | RAMGS13 | RAMGS14 |
RAMGS15 PAGE = 1

/* The following section definitions are required when using the IPC API Drivers */
GROUP : > CPU1TOCPU2RAM, PAGE = 1
{
PUTBUFFER
PUTWRITEIDX
GETREADIDX
}

GROUP : > CPU2TOCPU1RAM, PAGE = 1
{
GETBUFFER : TYPE = DSECT
GETWRITEIDX : TYPE = DSECT
PUTREADIDX : TYPE = DSECT
}
}

Is there any mistakes in linker cmd file?

What is the proper way to jump from the boot loader to application code? I have used the following piece of code, is it correct? Do we need to jump to c_init_00?

void (*funcPtr)(void) = (void (*)(void))0x082000;

(*funcPtr)(); 

  • 0
    TI__Mastermind 30255 points
    Hello,

    Nothing looks to be obviously incorrect about your linker files. It is most likely you are using the "ramfunc" section but I will note that we have bug regarding the __TI_COMPILER_VERSION should be __TI_COMPILER_VERSION__ and the ramfunc should be in an #else statement. I doubt that is your issue.

    Please refer to the sci flash kernel example in controlSUITE under F2837xD_examples_Dual, that will likely help. Also if you are using emulation boot, that requires the debugger to be connected. See TRM for more details: www.ti.com/.../spruhm8e.pdf

    Best Regards
    Chris