Hello,
In the SCI peripheral of the C28x series processors there are two modes of operation: Idle Line Mode and Address Bit Mode.
The manual states that in the Idle Line Mode there is an idle time of less than 10 bits between every byte + control data that you send.
This can give you more than 100% overhead for every 8 bits that you send !
We want to work at the high speeds of 7-8 mbps which is theoretically achievable according to the manual.
The question is what will be the idle time between every data byte that we send and how this will limit our throughput.
What is the real penalty in the Idle Line Mode ? How much is this less than 10 bits idle time ? Can this be stated exactly ?
Thanks to all !