Interfacing problem between ADC module & External signal circuit

#include "stdio.h"
#include "stdlib.h"
#include "DSP280x_Device.h"
#include "DSP280x_Examples.h"

// Prototype
void init_system(void);
void init_epwm1(void);
void init_adc(void);
void adc_isr(void);

// Global Variable
 unsigned int V[200];

void main(void)
{
	init_system();
	adc_isr();
}



void init_system(void)
{
//Step1: Initialize System Control Peripheral Clock:
 		EALLOW;
		SysCtrlRegs.WDKEY = 0x0055;
	    SysCtrlRegs.WDKEY = 0x00AA;
	    SysCtrlRegs.PLLSTS.bit.MCLKSTS = 0;			// Normal condition (Device not in limp mode) (missing OSCCLK clock not been detected)
//	    SysCtrlRegs.PLLSTS.bit.CLKINDIV = 0;		// CLKIN divide by 2 is enabled
	    SysCtrlRegs.PLLSTS.bit.MCLKOFF = 1;			// Oscillator fail-detect logic is disabled (PLL not issue limp-mode clock)
	    SysCtrlRegs.PLLSTS.bit.PLLLOCKS = 0;		// PLL is lock & CPU is clocked by OSCCLK/2
	    SysCtrlRegs.HISPCP.bit.HSPCLK = 1;			// HSPCLK=SYSCLKOUT/2 (i.e 100/2=50MHz)
	    SysCtrlRegs.LOSPCP.bit.LSPCLK = 0;			// LSPCLK=SYSCLKOUT

	    SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;		// Enable clock for all Peripheral
	    SysCtrlRegs.PCLKCR0.bit.ADCENCLK = 1;		// Enable clock for ADC
	    SysCtrlRegs.PCLKCR1.bit.EPWM1ENCLK = 1;		// Enable clock for ePWM1
	    EDIS;
//Step2: Initialize ECap GPIO Pins:
	    EALLOW;
//		GpioCtrlRegs.GPAPUD.bit.GPIO0 = 0;   // Enable pull up on GPIO0
//        	GpioCtrlRegs.GPADIR.bit.GPIO0 = 1;   // GPIO0 = output
//		GpioDataRegs.GPASET.bit.GPIO0 = 1;   // Load output latch
		GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1;
	    EDIS;

//Step3: Clear all interrupts and initialize PIE vector table:
		IER = 0x0000;						// Disable CPU interrupts
		IFR = 0x0000;						// clear all CPU interrupt flags
		EALLOW;
		PieVectTable.ADCINT = &adc_isr;		// initialize PIE Vector Table of ADC1
		EDIS;
//Step4: Initialize all the Device Peripherals:
		init_adc();
		init_epwm1();

//Step5: User specific code, enable interrupts:
		// Initialize PIE Control Register:
	    PieCtrlRegs.PIECTRL.bit.ENPIE = 1;	// Enable PIE (peripheral interrupt expansion)
		PieCtrlRegs.PIEIER1.bit.INTx6 = 1;	// Enable Interrupt ADCINT

	    IER |= M_INT1; // Enable CPU Interrupt 1
	    EINT;			// Enable Global interrupt INTM
	    ERTM;			// Enable Global real time interrupt DBGM
}


void init_epwm1(void)
{
	EPwm1Regs.TBPRD = 1000;						// 50KHz
	    EPwm1Regs.TBCTL.bit.FREE_SOFT = 2;      // free run at emul break
	    EPwm1Regs.TBCTL.bit.CTRMODE = 2;        // count up-down mode
	    EPwm1Regs.TBCTL.bit.PHSEN = 0;          // disable phase in
	    EPwm1Regs.TBCTL.bit.PRDLD = 0;          // reload on counter = 0
	    EPwm1Regs.TBCTL.bit.SWFSYNC = 0;        // no sw force sync out
	    EPwm1Regs.TBCTL.bit.SYNCOSEL = 3;       // disable SYNCOUT
	    EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0;      // HSPCLKDIV = 1
	    EPwm1Regs.TBCTL.bit.CLKDIV = 0;         // CLKDIV = 1
	    EPwm1Regs.TBCTL.bit.PHSDIR = 0;         // don't care
	EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
	EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
	EPwm1Regs.CMPA.half.CMPA = 500;
	EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;
	EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR;

	EPwm1Regs.ETPS.bit.SOCAPRD = 1;         // Generate SOCA pulse on 1st event
	EPwm1Regs.ETSEL.bit.SOCAEN = 1;         // Enable EPWMAxSOCA pulse
	EPwm1Regs.ETSEL.bit.SOCASEL = 2;        // Select SOC on PRD event

}


void init_adc(void)
{
	AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1; // SEQ1 start from ePWM_SOCA trigger
    AdcRegs.ADCTRL3.bit.ADCCLKPS = 2;      // i.e 4; ADC Clock Pre-scaler (i.e 12.5MHz)
    AdcRegs.ADCTRL3.bit.SMODE_SEL = 0;      // Sequential model
    AdcRegs.ADCREFSEL.bit.REF_SEL = 0;

    AdcRegs.ADCMAXCONV.all = 0;             // 1 Conv's on SEQ
    AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0;    // Setup ADCINA0 as 1st SEQ Conv.

	AdcRegs.ADCTRL1.bit.SEQ_CASC = 1;		// Cascaded Sequencer Mode
    AdcRegs.ADCTRL1.bit.SEQ_OVRD = 0;       // disable SEQ overriding mode
    AdcRegs.ADCTRL1.bit.CONT_RUN = 1;       // Continuous Run mode
    AdcRegs.ADCTRL1.bit.CPS = 0;            // divide by 1 (i.e ADCCLK=12.5mhz=80ns)
	AdcRegs.ADCTRL1.bit.ACQ_PS = 7;	     // S/H=(1+ACQ_PS)*(time of ADCCLK)


    AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1;   // Enable SEQ1 interrupt request to CPU
    AdcRegs.ADCTRL2.bit.INT_MOD_SEQ1 = 0;   // Interrupt after every end of sequence

}

void adc_isr(void)
{
	unsigned int  t;
	for(t=0;t<10;t++)
    	{
           V[t] = AdcRegs.ADCRESULT0;                   // Stores Digital value
      	   printf("Digital Voltage: V[t]= %u \n", V[t]);
    	}

    AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;                // Clear INT SEQ1 bit
    AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 0;               // Disable SEQ1 interrupt
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;             // Acknowledge interrupt to PIE
    return;
}