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TMS320C28346: About the GPIO register

Keirs
Expert 2605 points
Part Number: TMS320C28346

Hello.

I have two questions.

1.Is following description in the datasheet  typo?

 a. In the table 60 at the page of 78, bit 31-3 is reserved field.

 b. In the figure 59 at the page of 80, reset value of the register is x.

2.How long does latched value remain if  the GPxDAT register is written when GPIO is input mode?

  For example, How long does latched value remain when GPADAT-GPIO7 is written 0 if GPIO is configured as input and pullup?

Regards,

uchida-k

  • 0
    Expert 2605 points
    Hello,

    Could you give me something updates?

    Regards,

    uchida-k
  • 0 in reply to Keirs
    TI__Guru** 109125 points

    Uchida-san,

    2.How long does latched value remain if  the GPxDAT register is written when GPIO is input mode?

    This value remains there till new values is written or device is reset.

    Will get back to you on other query related to datasheet correction.

    Regards,

    Vivek Singh

  • 0 in reply to Vivek Singh
    Expert 2605 points
    Hi Vivek,

    Thank you for your reply.
    I am waiting for your contact related datasheet correction.

    Just to be sure , are descriptions I pointed out typo?

    Regards,
    uchida-k
  • 0 in reply to Keirs
    TI__Guru** 109125 points

    Hi Uchida-san,

     a. In the table 60 at the page of 78, bit 31-3 is reserved field.

    This is not correct. Only 31 to 24 are reserved. We'll have this corrected in next release. Thank you for the feedback.

    b. In the figure 59 at the page of 80, reset value of the register is x.

    Reset value is given as "x" because it depends on the value driven from outside (by default the pins are input) on the board.

    Regards,

    Vivek Singh

  • 0 in reply to Vivek Singh
    Expert 2605 points

    Hi vivek,

    Thank you for your reply.
     
    Reset value is given as "x" because it depends on the value driven from outside (by default the pins are input) on the board.
     
    Figure 59 means GPIO Port B Set, Clear and Toggle (GPBSET, GPBCLEAR, GPBTOGGLE) Registers.
    Reset value of this register is x although the reset value of other GPIO Port Set, Clear and Toggle Resisters is 0.

    Is it correct?

    Regards,

    uchida-k

  • 0 in reply to Keirs
    TI__Guru** 109125 points

    Uchida-san,

    Figure 59 means GPIO Port B Set, Clear and Toggle (GPBSET, GPBCLEAR, GPBTOGGLE) Registers.
    Reset value of this register is x although the reset value of other GPIO Port Set, Clear and Toggle Resisters is 0. 

    Yes, this also need correction in document. Thanks again for the feedback.

    Regards,

    Vivek Singh

  • 0 in reply to Vivek Singh
    Expert 2605 points
    Hi vivek,

    I understand.
    Thank you.

    Regards,
    uchida-k