Dear all,
I am running into an ILLEGAL_ISR when trying to integrate the HRPWM, ADC and CLA all together although they seemingly occupy different interrupt slots in the PieVectTable. After a search through the forum, I am suspecting that a register value is overwritten somewhere by a value that points to the ILLEGAL_ISR routine. Could you please have a look at my code below (excerpt from the main{} routine), as I am unable to figure out where the mistake is.
Thanks in advance.
Giel Van den Broeck
Tool/software: Code Composer Studio
// // Initialize System Control for Control and Analog Subsystems // Enable Peripheral Clocks // This example function is found in the F2837xD_SysCtrl.c file. // EALLOW; // This is needed to write to EALLOW protected registers InitSysCtrl(); EDIS; // Disable CPU interrupts DINT; // // Initialize GPIO // // PWM InitEPwmGpio(); // Setup LED2 GPIO_SetupPinMux(31, GPIO_MUX_CPU1, 0); GPIO_SetupPinOptions(31, GPIO_OUTPUT, GPIO_PUSHPULL); // // Initialize PIE control registers to their default state. // The default state is all PIE interrupts disabled and flags // are cleared. // // // This function is found in the F2837xD_PieCtrl.c file. // InitPieCtrl(); // // Disable CPU interrupts and clear all CPU interrupt flags: // EALLOW; IER = 0x0000; IFR = 0x0000; // // Initialize the PIE vector table with pointers to the shell Interrupt // Service Routines (ISR). // This will populate the entire table, even if the interrupt // is not used in this example. This is useful for debug purposes. // The shell ISR routines are found in F2837xD_DefaultIsr.c. // This function is found in F2837xD_PieVect.c. // InitPieVectTable(); EDIS; // // CLA configuration // Configure the CLA memory spaces first followed by // the CLA task vectors // CLA_configClaMemory(); CLA_initCpu1Cla1(); // Enable interrupts EALLOW; PieVectTable.ADCA1_INT = &adca1_isr; //function for ADCA interrupt 1 PieVectTable.EPWM1_INT = &epwm1_isr; //function for EPWM1 interrupt PieVectTable.CLA1_1_INT = &cla1Isr1; PieVectTable.CLA1_2_INT = &cla1Isr2; PieVectTable.CLA1_3_INT = &cla1Isr3; PieVectTable.CLA1_4_INT = &cla1Isr4; PieVectTable.CLA1_5_INT = &cla1Isr5; PieVectTable.CLA1_6_INT = &cla1Isr6; PieVectTable.CLA1_7_INT = &cla1Isr7; PieVectTable.CLA1_8_INT = &cla1Isr8; EDIS; // Enable global Interrupts and higher priority real-time debug events IER |= M_INT1; //Enable group 1 interrupts (ADC interrupts) IER |= M_INT3; //Enable group 3 interrupts (ePwm interrupts) IER |= M_INT11;//Enable group 11 interrupts (CLA interrupts) //EINT; // Enable Global interrupt INTM //ERTM; // Enable Global realtime interrupt DBGM // Enable PIE interrupt PieCtrlRegs.PIEIER1.bit.INTx1 = 1; // enable ADCA1 interrupt (consult technical reference manual p.94) PieCtrlRegs.PIEIER3.bit.INTx1 = 1; // enable EPWM1 interrupt //PieCtrlRegs.PIEIER11.bit.INTx1 = 1; PieCtrlRegs.PIEIER11.all = 0xFFFF; // enable CLA interrupts // // Initialize system variables, enable HRPWM // UpdateFine = 1; PeriodFine = 0; status = SFO_INCOMPLETE; // // Enable global Interrupts and higher priority real-time debug events: // EINT; // Enable Global interrupt INTM ERTM; // Enable Global realtime interrupt DBGM // // Calling SFO() updates the HRMSTEP register with calibrated MEP_ScaleFactor. // HRMSTEP must be populated with a scale factor value prior to enabling // high resolution period control. // //while(status == SFO_INCOMPLETE) // Call until complete //{ //status = SFO(); //if (status == SFO_ERROR) //{ //error(); // SFO function returns 2 if an error occurs & # of MEP //} // steps/coarse step exceeds maximum of 255. //} // // ADC configuration // ADC_Config(); // Configure the ADC SOC channels SetupADCChannels(); // Link the SOC channels to ADCIN channels // // ePWM and HRPWM register configuration // HRPWM_Config(PWM_PERIOD); // ePWMx target EALLOW; // CLA test //CLA_runTest();