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TMS320F28069: How to implement bipolar modulation for BLDC motor?

Jołek Fikołek
Prodigy 70 points
Part Number: TMS320F28069
Other Parts Discussed in Thread: DRV8307

I have a custom board with TMS320F28069 for control BLDC motor with hall sensor. Firstly I would like to implement bipolar modulation in order to protect bootstrap circuit form discharge when the motor is blocked (I limit the duty cycle to 95%). Secondly  would like to have four quadrant operation of the motor.

I have analysed the TI InstantBLDC example where the unipolar modulation is implemented.

In order to have bipolar modulation I need deadtime insertion to protect switches form short-circuit. For example for Hall state 101

PWM1A and PWM1B is configured as complementary PWM.

For PWM2A and PWM2B I use action qualifier submodule to force 0 for high side and 1 for low side transistor.

The problem is with PWM3 because i need turn off both transistor after next zero of the PWM counter. Using action qualifier is not possible because the deadband submodule prevent form blocking both PWM in this way:

            (*ePWM[3]).AQCSFRC.bit.CSFB = 1;            /* Forcing a continuous Low on output A of EPWM3    */

            (*ePWM[3]).AQCSFRC.bit.CSFA = 1;            /* Forcing a continuous Low on output B of EPWM3    */

The high side transistor off but the low side is always on.

I have considered using TripZone or disabling deadband module but in this way can’t force both transistor off in zero counter event of the ePWM module like using Action Qualifier.

Here is an example of bipolar modulation in driver drv8307 with Synch Rectification (Page 13).

www.ti.com/.../drv8307.pdf

Do You have any idea how to implement bipolar modulation for BLDC?

  • 0
    TI__Guru** 109760 points
    You can use AQCTLA and DBCTL to set the EWPM1A and EPWM1B output only with dead-band enable, and use AQCSFRC to set the EPWM2 and EPWM3 output. The other communication states is the same setting by AQCTLA, DBCTL and AQCSFRC also.
  • 0 in reply to Yanming Luo
    Prodigy 70 points

    Thanks for Your replay. I have also some more questions.

    How should I modify AQCTLA and DBCTL? I have testes almost all of the possible registers of AQ and DB submodule without success. I always observe one switching without deadtime on the begging of the new commutation sector and one at the end.

    There is a problem with DB Submodule because it is not shadowed and every change in this register is immediate.

    According to Your advice here is a part of my code for one sector:

    1) I modify AQCTLB (I have swapped PWMA with PWMB on my PCB and I use PWMB on the input of DB Submodule)

    2) I am not sure what should I do with DBCTL so I tested disabling deadtime or changing POLSEL

    3) I use to force as in the code included below: I have tested also RLDCSF.

         case HALL_STATE_ABC_100:

                (*ePWM[pBLDC->PWMa]).AQCTLB.bit.ZRO = 0;

                (*ePWM[pBLDC->PWMb]).AQCTLB.bit.ZRO = AQ_SET;

                (*ePWM[pBLDC->PWMc]).AQCTLB.bit.ZRO = 0;

     

                (*ePWM[pBLDC->PWMa]).AQSFRC.bit.RLDCSF = 0;

                (*ePWM[pBLDC->PWMb]).AQSFRC.bit.RLDCSF = 3;

                (*ePWM[pBLDC->PWMc]).AQSFRC.bit.RLDCSF = 0;

     

     

                (*ePWM[pBLDC->PWMa]).DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;

                (*ePWM[pBLDC->PWMb]).DBCTL.bit.OUT_MODE = DB_DISABLE;

                (*ePWM[pBLDC->PWMc]).DBCTL.bit.OUT_MODE = DB_DISABLE;

     

                (*ePWM[pBLDC->PWMa]).AQCSFRC.bit.CSFB = 0;            /* Forcing disabledd on output A of EPWM1           */

     

                (*ePWM[pBLDC->PWMa]).CMPB = pBLDC->PWM;                 /* PWM signal on output A of EPWM1   */

                (*ePWM[pBLDC->PWMa]).AQCSFRC.bit.CSFA = 1;            /* Forcing a continuous Low on output B of EPWM1    */

                                                              /*                                                  */

                (*ePWM[pBLDC->PWMb]).AQCSFRC.bit.CSFB = 1;            /* Forcing a continuous Low on output A of EPWM2    */

                (*ePWM[pBLDC->PWMb]).AQCSFRC.bit.CSFA = 1;            /* Forcing a continuous Low on output B of EPWM2    */

                                                              /*                                                  */

                (*ePWM[pBLDC->PWMc]).AQCSFRC.bit.CSFB = 1;            /* Forcing a continuous Low on output A of EPWM3    */

                (*ePWM[pBLDC->PWMc]).AQCSFRC.bit.CSFA = 2;            /* Forcing a continuous High on output B of EPWM3   */

                break;

    Do You have any idea what is wrong?