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TMS320F28075: CAN Interface Registers and Busy bit

Part Number: TMS320F28075
Other Parts Discussed in Thread: C2000WARE

Hi,
in Technical Reference Manual I've read that many bits in Interface Register are write protected by Busy bit.

I've seen that in TI CAN driverlib (C2000Ware 1.0.1.0) the following sequence is used to change mailbox bit:

// ------------------- SEQUENCE 1 -------------------

//
// Configure mailbox number
//
mailboxNum = 5;

//
// Wait to be sure that this interface is not busy.
//
while((HWREGH(CANB_BASE + CAN_O_IF1CMD) & CAN_IF1CMD_BUSY) == CAN_IF1CMD_BUSY)
{
}

//
// Only change the interrupt pending state by setting only the CAN_IF1CMD_CLRINTPND bit.
//
HWREG_BP(CANB_BASE + CAN_O_IF1CMD) = CAN_IF1CMD_CLRINTPND;

//
// Send the clear pending interrupt command to the CAN controller.
//
HWREGH(CANB_BASE + CAN_O_IF1CMD) = mailboxNum & CAN_IF1CMD_MSG_NUM_M;

//
// Wait to be sure that this interface is not busy.
//
while((HWREGH(CANB_BASE + CAN_O_IF1CMD) & CAN_IF1CMD_BUSY) == CAN_IF1CMD_BUSY)
{
}

// ------------------- END OF SEQUENCE 1 -------------------


This sequence is clear to me.


Now consider the following sequence:

// ------------------- SEQUENCE 2 -------------------

//
// Configure mailbox number
//
mailboxNum = 5;

// temporary RAM variable
cmdRegisterTmp = CAN_IF2CMD_CONTROL | (mailboxNum & CAN_IF2CMD_MSG_NUM_M);

//
// Wait to be sure that INTERFACE 1 is not busy.
//
while((HWREGH(CANB_BASE + CAN_O_IF1CMD) & CAN_IF1CMD_BUSY) == CAN_IF1CMD_BUSY)
{
}
//
// Only change the interrupt pending state by setting only the
// CAN_IF1CMD_CLRINTPND bit.
//
HWREG_BP(CANB_BASE + CAN_O_IF1CMD) = CAN_IF1CMD_CLRINTPND;

//
// Send the clear pending interrupt command to the CAN controller.
//
HWREGH(CANB_BASE + CAN_O_IF1CMD) = mailboxNum & CAN_IF1CMD_MSG_NUM_M;

//
// !!! DON'T WAIT to be sure that INTERFACE 1 is not busy!!!
//
//
// Immediatly access to Command Register through INTERFACE REGISTERS 2
// I know that IF2 registers are not busy because I never used them
//
HWREG_BP(CANB_BASE + CAN_O_IF2CMD) = cmdRegisterTmp;

// ------------------- END OF SEQUENCE 2 -------------------


Is SEQUENCE 2 correct?
In other words if I access the same mailbox through two different Interface Register Set could I skip the Busy bit check?

Thank you.

Best regards,

Demis Biscaro