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TMS320F28075: EPWM Master Slave configuration Issue

Part Number: TMS320F28075

Hi,

I am working on EPWM driver in TMS320F28075 controller. I am configuring two PWM modules i.e. EPWM1 and EPWM2. The TBCLK is set to 60MHz and the Fpwm is 20KHz.

I am making the EPWM1 as master by keeping the PHSEN = 0 and generating sync pulse at CTR = ZERO. And EPWM2 as slave by making PHSEN =1 and TBPHS= 0x0000 with sync pulse generated by the syncIN through EPWM1.

Although I am configuring both the PWM modules as per the reference guide, The PWMs are not exactly synced. There is a lag in slave from master of about 30nS.

Please let me know if there is anything I am missing here. I need both PWMs to be synced properly.

Thanks,

Shalini

  • It may be a good idea to disable the EPWM clocks during init and enable it after, so that they all start at the same time. If this is not enough answer, someone of us will answer you.
  • Hi Shalini,

    In addition to Ramesh's suggestion to use CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 0 before ePWM configs and then =1 when all ePWMs are fully configured and ready to start, also note that there is a fixed delay master-to-slave in the sync. chain given in the TRM section "13.4.3.3 Time-Base Counter Synchronization":

    The delay from internal master module to slave modules is given by:
    – if ( TBCLK = EPWMCLK): 2 x EPWMCLK
    – if ( TBCLK != EPWMCLK):1 TBCLK

    So I think you just need to account for this in your phase difference calculation.