TMS320F28377S: SPI Communication Problem Between two F28777S controller.

Hi,

i try to data communication between two F28377S IC. i set one of them as master and another one is slave.

The master one sending allways data , but slave one is reading sometimes true value sometimes wrong value, it looks like there is not snchronization bettwen master and slave, when i read sheets, SPISTEA provide syncronization between two IC but when i look by ossiloscope in this pin , it is allways low.

Master IC Code:

void spi_fifo_init()
{
    //
    // Initialize SPI FIFO registers
    //
    SpiaRegs.SPIFFTX.all = 0xC022;    // Enable FIFOs, set TX FIFO level to 4
    SpiaRegs.SPIFFRX.all = 0x0022;    // Set RX FIFO level to 4
    SpiaRegs.SPIFFCT.all = 0x00;

    SpiaRegs.SPIFFTX.bit.TXFIFO=1;
    SpiaRegs.SPIFFRX.bit.RXFIFORESET=1;

    //
    // Initialize core SPI registers
    //
    InitSpi();
}

interrupt void spiTxFifoIsr(void)
{
    GPIO_WritePin(49, 0);
   SpiaRegs.SPITXBUF=sdata;      // Send data
   SpiaRegs.SPIFFTX.bit.TXFFINTCLR=1;  // Clear Interrupt flag
   PieCtrlRegs.PIEACK.all|=0x20;       // Issue PIE ACK
   GPIO_WritePin(49, 1);
}

interrupt void spiRxFifoIsr(void)
{
    rdata=SpiaRegs.SPIRXBUF;         // Read data
    SpiaRegs.SPIFFRX.bit.RXFFOVFCLR=1;  // Clear Overflow flag
    SpiaRegs.SPIFFRX.bit.RXFFINTCLR=1;  // Clear Interrupt flag
    PieCtrlRegs.PIEACK.all|=0x20;       // Issue PIE ack
}

void InitSpi(void)
{
    // Initialize SPI-A

    // Set reset low before configuration changes
    // Clock polarity (0 == rising, 1 == falling)
    // 16-bit character
    // Enable loop-back
    SpiaRegs.SPICCR.bit.SPISWRESET = 0;
    SpiaRegs.SPICCR.bit.CLKPOLARITY = 0;
    SpiaRegs.SPICCR.bit.SPICHAR = (16-1);
    SpiaRegs.SPICCR.bit.SPILBK = 0;

    // Enable master (0 == slave, 1 == master)
    // Enable transmission (Talk)
    // Clock phase (0 == normal, 1 == delayed)
    // SPI interrupts are disabled
    SpiaRegs.SPICTL.bit.MASTER_SLAVE = 1;
    SpiaRegs.SPICTL.bit.TALK = 1;
    SpiaRegs.SPICTL.bit.CLK_PHASE = 0;
    SpiaRegs.SPICTL.bit.SPIINTENA = 1;

    // Set the baud rate
    SpiaRegs.SPIBRR.bit.SPI_BIT_RATE = SPI_BRR;

    // Set FREE bit
    // Halting on a breakpoint will not halt the SPI
    SpiaRegs.SPIPRI.bit.FREE = 1;
    // Release the SPI from reset
    SpiaRegs.SPICCR.bit.SPISWRESET = 1;
}

-----------------------------------------------------------------------------------------------------------------------------

SLAVE IC Code:

void spi_fifo_init()
{
    //
    // Initialize SPI FIFO registers
    //
    SpiaRegs.SPIFFTX.all = 0xC022;    // Enable FIFOs, set TX FIFO level to 4
    SpiaRegs.SPIFFRX.all = 0x0022;    // Set RX FIFO level to 4
    SpiaRegs.SPIFFCT.all = 0x00;

    SpiaRegs.SPIFFTX.bit.TXFIFO=1;
    SpiaRegs.SPIFFRX.bit.RXFIFORESET=1;

    InitSpi();
}
interrupt void spiTxFifoIsr(void)
{
   SpiaRegs.SPITXBUF=rdata;             // Send data
   SpiaRegs.SPIFFTX.bit.TXFFINTCLR=1;  // Clear Interrupt flag
   PieCtrlRegs.PIEACK.all|=0x20;       // Issue PIE ACK
}
interrupt void spiRxFifoIsr(void)
{
    GPIO_WritePin(50, 1);
    rdata=(SpiaRegs.SPIRXBUF);
    SpiaRegs.SPIFFRX.bit.RXFFOVFCLR=1;  // Clear Overflow flag
    SpiaRegs.SPIFFRX.bit.RXFFINTCLR=1;  // Clear Interrupt flag
    PieCtrlRegs.PIEACK.all|=0x20;       // Issue PIE ack
    GPIO_WritePin(50, 0);
}

void InitSpi(void)
{
    // Initialize SPI-A

    // Set reset low before configuration changes
    // Clock polarity (0 == rising, 1 == falling)
    // 16-bit character
    // Enable loop-back
    SpiaRegs.SPICCR.bit.SPISWRESET = 0;
    SpiaRegs.SPICCR.bit.CLKPOLARITY = 0;
    SpiaRegs.SPICCR.bit.SPICHAR = (16-1);
    SpiaRegs.SPICCR.bit.SPILBK = 0;


    // Enable master (0 == slave, 1 == master)
    // Enable transmission (Talk)
    // Clock phase (0 == normal, 1 == delayed)
    // SPI interrupts are disabled
    SpiaRegs.SPICTL.bit.MASTER_SLAVE = 0;///
    SpiaRegs.SPICTL.bit.TALK = 1;
    SpiaRegs.SPICTL.bit.CLK_PHASE = 0;
    SpiaRegs.SPICTL.bit.SPIINTENA = 1;

    // Set the baud rate
    SpiaRegs.SPIBRR.bit.SPI_BIT_RATE = SPI_BRR;

    // Set FREE bit
    // Halting on a breakpoint will not halt the SPI
    SpiaRegs.SPIPRI.bit.FREE = 1;
    // Release the SPI from reset
    SpiaRegs.SPICCR.bit.SPISWRESET = 1;
}

Waiting you comments..

Thank you.