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Original question:

TMS320F28379D: EMIF throughput, clock frequency, and ECC

TMS320F28379D: EMIF slew rate, HS, and termination

Lenio Cacula
Genius 15890 points
Part Number: TMS320F28379D

My customer is using two external SRAM devices (CY62167EV30) connected to EMIF. I have already posted a couple of times with regards to this same application - these are additional questions I would like to follow up:

  • At what speeds are HS design techniques recommended?
  • Do the EMIF signals have slew rate control?
  • Have you seen termination for this level of micro?  

Thank you!

  • 0
    TI__Guru** 109125 points

    Hi Lenio,

    At what speeds are HS design techniques recommended?

    Even though EMIF operates at 200MHz in ASRAM mode, the actual ASRAM signals are not toggling at that speed. The fastest signal will be WE and min pulse width for WE for this memory device is 35nn which is not that fast so I don't see a need for HS design techniques.

    Do the EMIF signals have slew rate control?

    No, we do not have slew rate control for IOs.

    Have you seen termination for this level of micro?

    In other post Tommy has shared the appnote which also has section on EMIF reference design.

    Regards,

    Vivek Singh