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interrupt
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  • Forum Post: DSP280x interrupts

    elenab
    Hello, I am working with DSP280x but i cannot manage in handling interrupts. I am new to this work so please be clear and simple in your suggestions! The problem is that i can compile my code with no errors but i do not know how to link my ISR function to the corresponding interrupt flag bit. ...
    on Dec 12, 2008

  • Forum Post: timer interrupt on C280x

    elenab
    Hello, I am trying to run my application on a simulator of C280x. The code has been compiled with no errors, but the code never enter the interrupt service routines of Timer 1 and Timer 2. I have set the following bits to enable interrupts on Timer1 and 2: CpuTimer1Regs.TCR.bit.TIE = 1; CpuTimer2Regs...
    on Dec 15, 2008

  • Forum Post: Re: timer interrupt on C280x

    Tim Love
    Elena, The examples included with the Peripheral header examples will not run as-is on the simulator in CCS. The simulator requires specific configuration to simulate PIE, timer and other peripherals, which is discussed in the document SPRU608A . CCS 3.3 includes some simulator examples that show...
    on Dec 17, 2008

  • Forum Post: TIMER0 Interrupt on F28335

    Enea Bianda
    Hi, I have an eZdspF28335 board and I need to sample a signal with a rate of 5 MHz in order to calculate his derivative. To perform this task I set TIMER0 to have an interrupt every 30 cycles (200 ns). The interrupt function sample the signal and do the necessary computations. The problem is that to...
    on Jan 2, 2009

  • Forum Post: Re: custom interrupt prolog/epilog

    BrandonAzbell
    I haven't found anything in the TMS320C28x Optimizing C/C++ Compiler Users Guide ( SPRU514 ) which would allow you to use a switch or pragma to enable the functionality you desire. Section 7.5.2 confirms the behavior that you describe already.
    on Jan 31, 2009

  • Forum Post: Re: custom interrupt prolog/epilog

    Mitja Nemec
    Hi Brandon! Thanks for checking, now I am sure I did not miss anything. I solved the issue with assembler macros based upon recomendations of "pdegli" in https://community.ti.com/forums/p/206/659.aspx#659. You But then I stumbled on a new issue. Does the compiler keep the stack pointer...
    on Feb 2, 2009

  • Forum Post: Re: Where is UART RX error vector on TMS320F2812?

    BrandonAzbell
    Jon I would like to install an ISR that resets the UART if any physical errors are detected (I would prefer not to poll the error bit). There is a bit called RX_ERR_INT_ENA in SCICTL1, but I don't see a vector for it in the PIE vector table ( 6.3.4 The PIE Vector Table in SPRU078E). Does the error...
    on Apr 15, 2009

  • Forum Post: Where is UART RX error vector on TMS320F2812?

    Jon10541
    I would like to install an ISR that resets the UART if any physical errors are detected (I would prefer not to poll the error bit). There is a bit called RX_ERR_INT_ENA in SCICTL1, but I don't see a vector for it in the PIE vector table ( 6.3.4 The PIE Vector Table in SPRU078E). Does the error interrupt...
    on Apr 14, 2009

  • Forum Post: Re: TMS320f2812 default ISRs; best practices?

    Lori Heustess
    Jon, For INT1 to INT12, where it says they are not used, these locations are truely not used. Instead they are muxed interrupts in the associated PIE group. For example, PIE group 1 will be fed into INT1 so there isn't a single vector that corresponds to INT1. Instead you use the vectors in PIE...
    on May 1, 2009

  • Forum Post: Re: TMS320f2812 default ISRs; best practices?

    Jon10541
    Great advice, but the question remains: the IFR only has 16 bits. How do you acknowledge interrupts 16-31?
    on May 4, 2009

  • Forum Post: Re: TMS320f2812 default ISRs; best practices?

    BrandonAzbell
    Those particular interrupts are defined as Non-maskable interrupts and are described in Section 3.5 of the TMS320C28x DSP CPU and Instruction Set Reference Guide ( SPRU430 ) . The software interrupt instructions and /NMI are associated with this. The C28x immediately approves this type of interrupt...
    on May 5, 2009

  • Forum Post: TMS320f2812 default ISRs; best practices?

    Jon10541
    I want to fill up the vector table with default ISRs that do sensible things in the event of a spurious interrupt. There is a vector table of 128 PIE vectors defined in the linker script like this: .vectors: > PIE PAGE 1 SPRU078E defines this in table 6.4. The first 32 vectors are for core interrupts...
    on Apr 30, 2009

  • Forum Post: what is the priority for 7 type of I2C interrupt requests?

    tiffany mao
    In TMS320x280x DSC, the I2C module can generate 7 types of basic interrupt requests. case I2C_NO_ISRC: // =0 case I2C_ARB_ISRC: // =1 case I2C_NACK_ISRC: // =2 case I2C_ARDY_ISRC: // =3 case I2C_RX_ISRC: // =4 case I2C_TX_ISRC: // =5 case I2C_SCD_ISRC: // =6 case I2C_AAS_ISRC: // =7 example: There...
    on May 8, 2009

  • Forum Post: Re: what is the priority for 7 type of I2C interrupt requests?

    BrandonAzbell
    Where is this code snip taken from? The I2C peripheral module itself has an Interrupt Enable Register and Interrupt Status Register as illustrated in the TMS320x280x, 2801x, 2804x Inter-Integrated Circuit (I2C) Reference Guide ( SPRU721 ). All of the interrupt sources are represented by a bit in the...
    on May 12, 2009

  • Forum Post: Re: regarding adc interrupts usage in tms320f28335

    BrandonAzbell
    Are you getting an ADC Sequencer Interrupt? You mention not entering the ISR continuously. Are you perhaps running in the START/STOP mode and not Continuous Run mode?
    on May 23, 2009

  • Forum Post: Re: TMS320F28335 Interrupt Mapping

    BrandonAzbell
    Have you taken a look at the TMS320F28335 C/C++ Header Files and Peripheral Examples ( SPRC530 )? These provide decent examples to start with in structuring your interrupt service routines and setting up the PIE. There is documentation on how to incorportate these header files and examples into your...
    on May 28, 2009

  • Forum Post: TMS320F28335 Interrupt Mapping

    BMJoshi
    Hi, I am trying to write an assembly language code where a timer interrupt is to be used and the task is performed repeatedly in the ISR. Can I get a simple assembly language code for the memory map file and the vector mapping for the interrupt? Right now I am all confused about PIE and all.. ...
    on May 22, 2009

  • Forum Post: Re: ISR for ADC is not working on F28335

    Chintan Chauhan
    Thanks, Alexander I have seent that example and according to that example i am able to get ADC interrupt but in this example SOC is on ePWM_SOCA_SEQ1, 1=SEQ1 start from ePWM_SOCA trigger, but i want to make it in Software trigger base as i want to start it once and want to get regular interrupt...
    on Jul 5, 2009

  • Forum Post: ISR for ADC is not working on F28335

    Chintan Chauhan
    Hi, To all, I m working on ADC. As per example i have taken ADC sample in continuous polling like this way EALLOW; SysCtrlRegs.PCLKCR0.bit.ADCENCLK = 1; ADC_cal(); EDIS; AdcRegs.ADCTRL3.all = 0x00E0; // Power up bandgap/reference/ADC circuits delay(50000); // Delay before converting...
    on Jul 3, 2009

  • Forum Post: Is PDPINTB generate continuous interrupt when C5TRIP is low?

    1391680
    Hi All I'm new to DSP world. I've started a project based on TMS320f2812. The problem I'm facing is when C5TRIP signal is in low state then PDPINTB interrupt generated continuously. even i clear the interrupt flag inside the ISR. What would be the reason? Is TMS320f2812 design that it...
    on Dec 4, 2009

  • Forum Post: Fifo SCI Transmit Interrupt in TMS320F28035

    sunil barot
    I want to set up interrupt when Fifo transmit is empty in TMS320F28035. I am looking at the example "scia_loopback_interrupts" for reference. Following two lines in the function "scia_fifo_init" sets up the interrupt enable. SciaRegs.SCICTL2.bit.TXINTENA =1; SciaRegs.SCICTL2.bit...
    on Dec 28, 2009

  • Forum Post: Generate Interrupt in TMS320F2812

    Aaron Rangel
    Hi I'm Aaron, I'm working with eZdsp TMS320F2812 in control motrol, and my software generates an interrupt according to the Event Manager module, I mean: PieVectTable.T1UFINT = &MainISR; I use the underflow of timer1 to generate the interrupt each 2KHz, and I generate a pwm pulse...
    on Aug 5, 2010

  • Forum Post: Illegal Instruction on F28035

    zg kou
    Hi All, My target chip is the TMS320F28035 and used emulator is the SD XDS510,i want to make a bldc controller, i use the iir filter for EMF , filter function is in the AD interrupt function, the problem is that when i allow ad interrupt, dsp will enter ILLEGAL_ISR () interrupt function, and when...
    on Aug 25, 2010

  • Forum Post: wakeup and GPIO6 interrupts

    Jeff59106
    I have a problem using wakeup and GPIO6 interrupts. I have experimented with the TI code - Example_280xHaltWake and everything works well. In my setup I am using GPIO6 as an interrupt on power off AND power ON (falling and rising edge). The desired behaviour is : 1 - observe interrupt on GPIO6...
    on Mar 21, 2011

  • Forum Post: Can we go into HALT mode (executing the IDLE instruction) within ISR?

    Jeff59106
    We are using the F2808. We want to go into HALT mode when a power loss GPIO pin is toggled. Can we go into HALT mode (executing the IDLE instruction) in the ISR? Can the processor handle being HALTed in the ISR, then woke up with the WAKEUP interrupt. Thanks
    on Mar 23, 2011
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