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Why don't motorware acknowledge the adc interrupt at the end of mainISR.

Other Parts Discussed in Thread: MOTORWARE, CONTROLSUITE

Motorware acknowledges the interrupt at the beginning of the mainISR. Why don't  acknowledge the adc interrupt  at the end of mainISR? 

what’s happened if there is recursive interrupt when the mainISR  is  in progress, and  will this cause some unstable issues in this situation?

  • Good observation.

    The code was written specifically to acknowledge the interrupt event at the start of the ISR to match the design of the MCU. If the peripheral event that generated the interrupt flag were not acknowledged AND the same oeripheral event occurred again, this event would be lost. By acknowledging the event at the start of the ISR, it becomes a pending interrupt that is called immediately on exit from the current ISR (if it is the highest priority interrupt pending).

    Keep in mind that all interrupts are masked upon entry into an ISR. For nested interrupts to occur the code must re-enable the CPU mask but (INTM). There is a good example of nested priority interrupts in ControlSUITE.

    Jeff