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Center Aligned PWM ADC trigger

Other Parts Discussed in Thread: TMS320F28054M, MOTORWARE

Hi,

I'm measuring 7.2 micro-seconds between the center (of the center aligned PWM pulses) to entering the mainISR().  This is measured by looking at the PWM pulses and setting a GPIO output at the very beginning of the mainISR().

This seems to indicate that either the ADC is not being triggered in the middle of the low side pulse, or the ADC is taking 7.2 usec to convert the seven channels.

This is a TMS320F28054M running at 60MHz with a project based on proj_Lab10b.   I would expect the ADC to take less than 2 usec to convert the 7 channels (3 currents, 3 voltages, bus).  I've looked closely at the ADC setup and it looks configured correctly to run at the CPU clock rate and with the minimum sample time.

Do you agree that 7.2 usec between the center of the PWMs to getting in the mainISR() seems to long?

Is there a way to actually see when the PWM is triggering the first ADC conversion?

Thanks.

  • Yes, it seems long.  I don't know the lab software or the board but some things which might be influencing your measurement are:

     - acquisition window: have you fully accounted for the AQ timings for each channel in the ADC conversion estimate?

     - interrupt latency: is another interrupt holding off mainISR(), or is INTM being manipulated somewhere in the code?

     - measurement: are you measuring from the right point in the PWM timing?  If you're using a PWM edge to take the measurement, are you sure of it's relation to PWM center and have you accounted for any dead-band?

    On F28054, /ADCSOCA and /ADCSOCB are brought out on I/O pins, so depending on your board you might be able configure those I/Os to get the exact ADC trigger point.

    These are just some suggestions.  I hope they help.

    Regards,

    Richard

  • Hi Richard - Thanks for the suggestions.  Per your suggestion I routed /ADCSOCA to the I/O pin to look at the exact timing.

    Below is a scope trace.    From top to bottom:  Green is entering mainISR(), Blue is the /ADCSOCA output, Orange is PWM1 upper, Purple is PWM1 lower. 

    You can see that the blue /ADCSOCA strobe is not triggered in the middle of the purple PWM 1B lower signal.

    From lab 10b, I haven't changed anything in the software regarding the setting up of the PWMs and running of the ignore shunt algorithm or function HAL_setTrigger().

    I am only looking at one PWM pulse at a time.  Are the centers of all there PWM pulses aligned?

    Maybe for the capture above the /ADCSOCA strobe is centered to one of the other PWM channels?

  • Lab 10a in particular has a function that changes the trigger point. There are a few timing plots in the lab guide. Have you looked at them? Please take a look and let us know if you have any questions. Please use MotorWare 15 though, because that's the motorware version that has updates to this lab.

    The document can be found under:

    C:\ti\motorware\motorware_1_01_00_15\docs\labs\instaspin_labs.pdf


    Then, scroll down to page 184. It explains how the sampling point is changed depending on limits of the duty cycle.

    -Jorge

  • Hi Jorge,

    Thanks for pointing me to the lab 10a  write up.   I was aware MW15 had improved current sampling for overmodulation,  but didn't know about the new write up.  I am using MW 15 and my own project based on Lab 10b using motion.

    Even after reading the description in the lab write up, I still can't explain the PWM signals and SOC I am seeing.

    Below are two scope captures.   The three PWMxL signals are green, purple, blue, and /ADCSOCA0 routed to GPIO8 is yellow.

    The first capture shows all three low side pwm signals pulsing high.    In the lab timing examples all three PWM channels are always shown centered aligned.   Notice in this capture the PWM signals aren't all exactly center aligned with each other.

    The second capture zooms in a little and shows PWM2L (purple) pulsing high while both PWM1L and PWM3L are high.   Notice the /ADCSOCA0 strobe is outside of the time when PWM2L is high.   This PWM2L pulse is about 5 usec which is not less than the MinWidth setting, so I would expect the SOC signal to be centered in this pulse.   I've verified my MinWidth setting (debugger) is 120, which for a 60 MHz 28054M is 2 usec.   I would expect only pulses less than 2 usec to be ignored.

    Why would the three PWML pulses not be exactly centered aligned, and why would the SOC pulse be outside the PWM2L pulse?

    Is there anything else I can check?

    I've watched IgnoreShunt in the debugger and it cycles from use_all to ignoring individual currents.   But for the captured waveforms should be a case where no current is being ignored.

    Thanks for the help.

  • I think I understand why the PWML signals wouldn't always be center aligned.   If the PWM CMPA values are changing from cycle to cycle because the high side duty cycle is changing, the low side signals are not centered aligned.   Basically the high side signals are always centered aligned, not the low side.  Does this sound correct?

    But I haven't been able to puzzle out whey the SOC pulse is not in the center of when the low side pulse is high.

    I am concerned with this because because my current waveform distorts at about >95% rated speed when in the overmodulation region.   I want to make sure the software is kicking off the ADC conversion at the correct time, and this is why I routed the /ADCSOCA0 to an output.

    Any thoughts on why the /ADCSOCA0 strobe would not occur within the 5 usec PWML pulse shown.

    Thanks.

  • It looks like for the 2805x MW15 has a bug in the PWM object in file pwm.h.

    The PWM object defines 11 words between PCCTL and TBPRDM.    There is really 12.    This lands the CMPAM register in the wrong spot, and this register is used for the current ignoring algorithm.

    With the correction below the /ADCSOCA0 pulse is centered in the PWM as expected.

    Let me know if you agree?

  • Sorry about the long delay, yes, I just checked and in fact this is a bug. What you have is correct, it should be a reserved array of [12]. I filed this as a bug so we can fix for next release. Thanks!
    -Jorge
  • Thanks Jorge. And happy new year!