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I am using a TMS320F28235 and want to run the SCI with 6.25MBit/s.
If the LSPCLK is 75MHz than there is no (integer) divider. Can I run the LSPCLK with 150MHz?. The datasheet says the max LSPCLK is 75MHz but in the SCI reference guide the configuration LSPCLK/1 is possible.
The MAX value for LSPCLK, as shown in the datasheet's electrical section should be taken as the MAX value for the applicable device.
In the next revision of the datasheet, the MAX LSPCLK value for 100 MHz devices is being increased to 100 MHz. This will enable the usage of /1 divisor for 100 MHz devices only.
For the 150 MHz devices, although the LSPCLK can reach 100 MHz, it is not possible in practice, since a divisor of 2 would yield 75 MHz. The new datasheet will also have a note under the clock table that highlights this fact.
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