Q: Question

 Can a PWM signal of 50% duty cycle of either 13.5MHz or 27MHz be generated on the 28335?

 

A:

Please refer to the data manual. 

Per the data manual, the maximum toggling frequency of the I/Os (this would include the PWM pins) is 25MHz. See section 6.9.1 GPIO - Output Timing. The PWM module itself should be capable of handling what you ask, but it is a limitation of the output buffers. It is not that they would stop switching above this limit but that the signal integrity would suffer.