Hello, I'm trying to enable the EMAC/MDIO interfaces in a RM48 HDK.
I've follwed the http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration
"Programming Sequence using HALCoGen generated drivers", using the LwIp code as a base, but not enabling LwIP, just phy and emac.
I will run other protocol over ethernet rather than IP, so I don't need it. But I'm not able to transmit a packet. I Have made a simple example using a static buffer just to test it.
----------------------
...
int eth_transmit(uint8_t* buf,uint32_t length){ if( length > 1500 )
return -1; else {
tx_buffer->next = NULL; tx_buffer->bufptr = buf; tx_buffer->bufoff_len = length; tx_buffer->flags_pktlen = length; tx_buffer->flags_pktlen |= EMAC_DSC_FLAG_EOP | EMAC_DSC_FLAG_SOP; EMACTxHdrDescPtrWrite(MDIO_0_BASE, (unsigned int)(tx_buffer), 1); return 0; }}
uint8_t vec[80] = { 0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA, 0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA, 0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA, 0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA, 0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA, 0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA, 0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA, 0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA, 0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA, 0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA, };
int eth_example_send(){ eth_transmit(vec,80); return 0;}
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When I run eth_example_send(), I got a Data Abort error from the processor in line of the emac.c file :
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valHDPbefWrite = HWREG(emacBase + EMAC_TXHDP(channel));
What I'm doing wrong ? I'm missing something ?
Thanks.
Hello Cristiano,
Thanks for the forum question.
Is the emacBase address configured? I looked into the TRM and it shows that "the memory-mapped registers for the EMAC. The base address for these registers is 0xFCF78000."
Regards,
Kevin Lavery
yes, I have used the HalCoGen 3.0 code ,the dp83640 phy code , the hdkif.c from the lwip port and the Programming Sequence using HALCoGen generated drivers.
Since in the lwport the order was not the same, I believe some things could be executed in diferent orders without any problem. I've put a debug on my code to check the exact order and how many times each function from the 3 API(MDIO,EMAC and DP83640) are called . So my Init sequence stays this way
EMACInit( EMAC_CTRL_BASE, EMAC_BASE)MDIOInit(MDIO_0_BASE,MDIO_FREQ_INPUT,MDIO_FREQ_OUTPUT )EMACRxBroadCastEnable(EMAC_BASE,0)EMACMACSrcAddrSet(EMAC_BASE, __mac__emacAddress)EMACMACAddrSet(EMAC_BASE, channel,__mac__emacAddress, EMAC_MACADDR_MATCH) // 8 timesphyID = Dp83640IDGet(MDIO_0_BASE, __mac__emacPhyAddress)MDIOPhyAliveStatusGet(MDIO_0_BASE) >> __mac__emacPhyAddress) & 0x01 Dp83640LinkStatusGet(MDIO_0_BASE, __mac__emacPhyAddress, 0xFFFF)Dp83640AutoNegotiate(MDIO_0_BASE, __mac__emacPhyAddress,(DP83640_100BTX | DP83640_100BTX_FD | DP83640_10BT | DP83640_10BT_FD)) == TRUEDp83640PartnerAbilityGet(MDIO_0_BASE, __mac__emacPhyAddress,&partnr_ablty)EMACDuplexSet(EMAC_BASE, phyduplex)EMACCoreIntAck(EMAC_BASE, EMAC_INT_CORE0_RX)EMACCoreIntAck(EMAC_BASE, EMAC_INT_CORE0_TX)EMACRxUnicastSet(EMAC_BASE, 0)EMACNumFreeBufSet(EMAC_BASE, 0, 1)EMACTxEnable(EMAC_BASE)EMACRxEnable(EMAC_BASE)EMACRxHdrDescPtrWrite(EMAC_BASE, (uint32_t)rx_buffer, 0)EMACMIIEnable(EMAC_BASE)EMACTxIntPulseEnable(EMAC_BASE, EMAC_CTRL_BASE, 0, 0)EMACRxIntPulseEnable(EMAC_BASE, EMAC_CTRL_BASE, 0, 0)EMACTxHdrDescPtrWrite(MDIO_0_BASE, (unsigned int)(tx_buffer), 0)
Until here it runs without any problem and the exit from the functions are OK. I've changed the tx_buffer to a static buffer :
volatile mac_rx_bd_t tx_buffer[80] = (mac_rx_bd_t*)EMAC_CTRL_RAM_BASE;
volatile mac_rx_bd_t rx_buffer[80] = (mac_rx_bd_t*)(EMAC_CTRL_RAM_BASE + SIZE_EMAC_CTRL_RAM / 2);
acessing it with tx_buffer[0] instead of tx_buffer
I saw also that I was calling
EMACTxHdrDescPtrWrite(MDIO_0_BASE, (unsigned int)(tx_buffer), 1);
instead of
EMACTxHdrDescPtrWrite(EMAC_BASE, (unsigned int)(tx_buffer), 1);
this was causing the data abort.
but I haven't seen any packet on my computer ( I'm running a sniffer in the interface connected to hercules ).
I didn't finded the mac destiny mac address, I've to assembly the entire eth packet or just write the payload in the buffer descriptor.
Thanks,
Cristiano
Cristiano,
From the debugger IDE, Can you check if the EMAC address space is accessible? Eg., TXREVID register should have 0x4EC0020D value. If the value does not match then likely your initialization code is not correct. In this case, how are you generating the initialization code?
Regards,Pramod
Pramod,
The value in the TXREVID( address 0xFCF78000 ) register is "0x4EC0020D".
I'm generating the code using the sequence from in LWIP webpage.
I've used the phy driver directly from the lwip project, and wroted my own code for the EMAC based in the demo/page.