RM57L843: MibSPI Self Test Error Injection

Part Number: RM57L843


I have a working nominal MibSPI loopback implementation and I am trying to use the 27.3.42 I/O-Loopback Test Control Register (IOLPBKTSTCR) to Inject the Various errors during the test.

The only error that I have been able to successfully inject is: 

Bit [20] CTRL BITERR Controls inducing of BITERR during I/O loopback test mode. 0 Do not interfere with looped-back data. 1 Induces bit errors by inverting the value of the incoming data during loopback.

Causing a:

Bit [28] BITERR in the RX Ram Flags

Is there any supplemental documentation around mibspi loopback fault injection that I can follow? Does SPI need to be set up in a specific way for the fault injection to work?

Any information would be helpful.

Thank you

11 Replies

  • I am specifically looking to implement a functionality check of:

    27.3.42 I/O-Loopback Test Control Register (IOLPBKTSTCR)

    19 CTRL DESYNC Controls inducing of the desync error during I/O loopback test mode.

    17 CTRL TIMEOUT Controls inducing of the timeout error during I/O loopback test mode.

    16 CTRL DLENERR Controls inducing of the data length error during I/O loopback test mode.

    But would like more information if available on:

    18 CTRL PARERR Controls inducing of the parity errors during I/O loopback test mode.

    2 CTRL SCS PINERR Enable/disable the injection of an error on the SPISCS[3:0] pins. The individual SPISCS[3:0] pins can be chosen using the ERR SCS PIN field.

    5-3 ERR SCS PIN Inject error on chip-select pin number x.

    As well.

  • In reply to Dmitri Zakharevski59:


    The only available documentation is as noted in the TRM section 27.2.10 Test Features and in the Register definition section (27.3.42). The specifics of each of the error types to be induced are also provided in the MibSPI/SPI chapter of the TRM, section 27.2.9 Safety Features. Note some of the error conditions only apply to Master Mode or may have different behaviors dependent on whether configured for Master or Slave.

    Thanks and Regards,

    Chuck Davenport

  • In reply to Chuck Davenport:

    Thanks Chuck,

    I am running in master mode, It looks like the failure injection is not working properly per documentation for all injected cases except CTRL BITERR.

    I can supply code to reproduce the results with HALCOGEN code if it helps,


  • In reply to Dmitri Zakharevski59:

    Thanks Dmitri,

    Feel free to post the code and I'll have a look. I will apologize in advance for the delay in getting to it as there are several debug activities related to questions on the E2E that I am currently working on.

    Thanks and Regards,

    Chuck Davenport

  • In reply to Chuck Davenport:

    Test on a RM57 HDK with Halcogen:

    bool mibspiLoopbackSelfTest(mibspiBASE_t *mibspi)

    uint32 start = (mibspi->TGCTRL[0] >> 8U) & 0xFFU;
    uint32 end = (mibspi->TGCTRL[1U] >> 8U) & 0xFFU;

    static uint16 tx_test[256U];
    static uint16 rx_test[256U];

    uint32_t ret = 0;

    uint32 i = 0U;
    while(i < (end - start))
    tx_test[i] = 0x00FFU;

    /* Clear Loopback incase enabled already */
    mibspi->IOLPKTSTCR = 0U;

    /* Enable Loopback either in Analog or Digital Mode */
    mibspi->IOLPKTSTCR = (uint32)0x00000A00U
    | (uint32)((uint32)1U << 1U); /* Analog */
    mibspi->IOLPKTSTCR = mibspi->IOLPKTSTCR & (uint32)0xFFE0FFFFU; /*Clear test flags */
    mibspi->IOLPKTSTCR = mibspi->IOLPKTSTCR | (uint32)0x001F0000U; /*Set test flags */

    mibspiSetData(mibspi, 0, tx_test);
    mibspiTransfer(mibspi, 0);

    while (!mibspiIsTransferComplete(mibspi, 0U)) {}

    ret |= mibspiGetData(mibspi, 0U, rx_test);

    /* Clear Loopback */
    mibspi->IOLPKTSTCR = 0U;

    /*ret should not be 0, It should indicate all errors but only BITERR works 0x10 */
    if (ret == 0U)
    return false;

    return true;
  • In reply to Dmitri Zakharevski59:

    Hi Chuck,

    Have you had a chance to try this out?

  • In reply to Dmitri Zakharevski59:

    Hi Dmitry,

    I will take some time on this tomorrow. Sorry for the delay on this.

    Thanks and Regards,

    Chuck Davenport

  • In reply to Chuck Davenport:

    Did you end up having the same results?
  • In reply to Dmitri Zakharevski59:

    Hello Dmitri,

    I believe the issue is you are trying to set and use all test flags at the same time. I believe they need to be used one at a time. i.e., you, most likely, can only test one fault condition at a time. What you are probably seeing is that the bit error condition takes precedence over the others. Can you try testing the individual error conditions to see if you get different results?

    Thanks and Regards,

    Chuck Davenport

  • In reply to Chuck Davenport:

    Sorry for the delay. Back on this issue.

    Setting one bit at a time does not work. Is there any sample code to recreate the fault injections available?

    I am running in loopback mode during the test if it makes a difference.