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TMS570LC4357: EMIF SDRAM controller operation details

Part Number: TMS570LC4357

Hello,

I am looking for more details on the exact behavior of the SDRAM controller of the EMIF. 

In particular, I would like to understand if really all read/write accesses start with an ACT command, or if the memory controller is first checking if the row/bank is already open and then proceeds to the read/write operation skipping the ACT. 

Also it's not clear to me when an open row is closed since auto precharge is not used. 

Any information will be appreciated. 

Mathieu