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TMS570LC4357: When does ESM Group 1 Bit 52 occurs?

Part Number: TMS570LC4357

Hello Support,

I understand when does ESM Group 2 Bit 3 occurs according to

https://e2e.ti.com/support/microcontrollers/hercules/f/312/t/592638

Question is under what condition does ESM Group 1 Bit 52 occurs?

CPU Interconnect Subsystem - Global error          Group1                52

Some details similar to previous link mentioned above from experts will help me understand better.

Thank you.

Regards

Pashan

  • Hello Pashan,

    I have forwarded your question to Mr.Crosby. He should reply shortly.

    Thanks and Regards,

    Chuck Davenport

  • In reply to Chuck Davenport:

    The CPU Interconnect subsystem is described in section 4.3 of the Technical Reference Manual. This ESM flag will be set on a parity error in the control or address signals. The most common occurrence of ESM error Group 1 Channel 52 is an inadvertent error that may happen after running the CPU self test at a GCLK frequency greater than the maximum HCLK frequency. This behavior is explained in device erratum DEVICE#48 in the errata document. In that case, the ESM flag may be cleared and the error ignored.

    Best Regards,
    Bob Crosby