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TMS570LS1227: SafeTIDiagnostic Library 2.3.1 TMS570LS1227_NoOS can't run

Part Number: TMS570LS1227

Hi Team,

  My customer now is using TMS570LS1227 as the traction inverter controller, which required at least ASIL-C level. while customer is using the safeTI Diagnostic library 2.3.1 for knowing the how to implement the safety library, but report an issue that the demo provided by the library run to while(1) within void _excpt_vec_abort_pref(); but with the emulator connected and debug step by step, the code will be executed well. Could you kindly give comments on this issue? PS: The demo file path: C:\ti\Hercules\SafeTI Diagnostic Library\2.3.1\build\TMS570LS1227_NoOS; Expect for your reply, thanks. Best Regards Benjamin

8 Replies

  • Hello Ben,

    I have forwarded your question to our SW experts, and you will get the response soon. Thanks

    Thanks and Regards,
    QJ Wang

  • Hi Benjamin,

    I have seen this issue causing because of CortexR4 Random Branch prediction logic, I think the fetch went of the Flash region where opcode is, since ECC is enabled and these locations does not have the corresponding ECC generated this ended up in prefetch abort. 

    There are two ways you can work around,

    1) Please try filling the entire Flash region using the linker command file( see below linker memory for reference)

    2) Disable ECC ( not recommended) 

    Please try and let me know if you still see the issue.

    ----------------- 

    MEMORY

    {

       VECTORS (X)  : origin=0x00000000 length=0x00000020

       FLASH0  (RX) : origin=0x00000020 length=0x0013FFE0 fill = 0xffffffff

       STACKS  (RW) : origin=0x08000000 length=0x00001800

       RAM (RW) : origin=0x08001800 length=0x0000AB00

       PROFILE(RW) : origin=0x0800C300 length=0x00007D00 /* Added for profiling purposes */

       LOG (RW) : origin=0x08014000 length=0x00002000 fill=0xDEADBEEF/* Added for logging purposes */

       FEE (R) : origin=0xF0200000 length=0x00000064 fill=0xDEADBEEF /* For FEE testing, Valid only for sample application */

    }

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    Regards
    Prathap

  • In reply to Prathap:

    Hi Prathap,
    Customer has tried this option but still blocked by the same issue.
    Could you kindly share the safety library to me directly with Compiler version and project configuration, which has been verified in your board?
    Expect for your reply, thanks.

    Best Regards
    Benjamin
  • In reply to Benjamin Zhou:

    Hi Benjamin,

    I have used the example as is from version SDL version 2.3.1, used compiler version 5.0.4, I did this on EVM ( internal ) board which is just a bear metal silicon checkout board.

    For debug purpose.. Have a loop to itself code at prefetch exception vector, program the code, run it, connect the debugger to figure out from LR register from where the exception was raised.

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    ---------------------------------------------------------------------------------------------------------
    Regards
    Prathap

  • In reply to Prathap:

    Hi Prathap,
    Customer tried using the same SDL 2.3.1 & compiler version 5.0.4 in TI EVM board, but still can't work it out. could you kindly provide the file with .zip compressed?

    Best Regards
    Benjamin
  • In reply to Benjamin Zhou:

    Hi Benjamin,

    I do not have any different file compared to whats provided in 2.3.1. release.

    I was able to reproduce, when i was doing power on/off, several times and I could hit _excpt_vec_abort_pref() once. When debugged the LR was showing some random value, which become very difficult to debug.

    I am working on it now, could not find the root cause yet.
    Mean while can the customer use regular HALCoGen Startup and call the SafeTI Diagnostics library API's in the main.

    ---------------------------------------------------------------------------------------------------------
    Please click the Verify Answer button on this post if it answers your question.
    ---------------------------------------------------------------------------------------------------------
    Regards
    Prathap

  • In reply to Prathap:

    Hi Prathap,
    Expect for your further progress. Currently customer is using the HALCoGen which enabled the safety feature;

    Best Regards
    Benjamin
  • In reply to Benjamin Zhou:

    Hi Benjamin,

    Can you comment out function vimParityCheck(); in the startup.c file and try running the test?

    I have not nailed down the root cause yet, But I noticed some ESM FIQ interrupt's occurring also noticed corrupted ISR address loaded to VIM module. I am working on it to understand further, meanwhile please comment out vimParityCheck(); in the startup.c

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    Please click the Verify Answer button on this post if it answers your question.
    ---------------------------------------------------------------------------------------------------------
    Regards
    Prathap

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