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Part Number: TMS570LS3137
Tool/software: Code Composer Studio
right now i am trying to impliment the bootloader and application project on the tms570HDK,both the bootloader and the app use UCOS-II and tftp (lwip).
most scenario you talked about are like this :
_c_int00 ;0x00 Bootloader reset b #0x7ff8 ;0x04 undefined_instruction, branch to application b #0x7ff8 ;0x08 software_interrupt, branch to application b #0x7ff8 ;0x0C prefetch_abort, branch to application b #0x7ff8 ;0x10 data_abort, branch to application b #0x7ff8 ; reserved, branch to application ldr pc,[pc,#-0x1b0] ;0x18 ldr pc,[pc,#-0x1b0] ;0x1C
The application vector table at the address 0x8000 should look as follows.
b _c_int00 ;0x00 application reset b _undef_ISR; 0x04 undefined_instruction b _swi_ISR ;0x08 software_interrupt b _prefetch_abort_ISR ;0x0C prefetch_abort b _data_abort_ISR ;0x10 data_abort b _reserved_ISR ; reserved ldr pc,[pc,#-0x1b0] ;0x18 ldr pc,[pc,#-0x1b0] ;0x1C
in all these cases ,the irq using the vector mode,and in the boot proj, the udef ,abort , swi have no ISR,,they just jump to the app‘s ISR.
so is the spna236,
but for the ucos project, the IRQ have to use index mode (legacy arm7 mode ) ，and all the exceptions have to be down in the bootloader .
can you give me some advice?
or if the sharing vectors in sram method described in spna236 works ,can you give me some specific suggestions about how to do in the app?
i am stucking here for a month ,realy need your help!
thank you !
Thanks and Regards,
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In reply to Chuck Davenport:
thank you for your help!
i think it is hard to know the adress of the "do_app_excep_process" in the bootloader programm,cause Bootloader and app are two seperate CCS Proj.
i think the way is to share the vector table in ram , right now my proj works, but i am not sure if there are still some hidden danger or bugs.
as in the app report spna236 chapter 3 considered several considerrations, and refer to the "TMS570 and vectors forwarding to application from bootloader "
[ https://lists.rtems.org/pipermail/devel/2015-November/012878.html ]
they finally choose the RAM vector and POM, but the code is less, i can't understand how to impliment it .
is it possible that you can give me the email of the auther who write SPNA236, so i can ask him some question?
In reply to guodong yao:
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