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TMS570LS3137: Read over I2C

Other Parts Discussed in Thread: HALCOGEN, TMS570LS3137

I’m trying to write and read from a Microchip 24AA01 EEPROM over the I2C1 of the TMS570LS3137. I configured the I2C driver with HALCoGen (version 3.00.00) in master mode, address size = 7 bits, count = 8 bits and baud rate = 100 kHz. I had to correct the generated initialization sequence: I2CMDR.BC = 0 instead of 7 and I2CMDR.FDF = 1 (otherwise it doesn’t work) instead of 0. At this time I can write to the EEPROM, but the reading still fails since the second start condition isn’t set correctly. I should set Start Bit - Device Address - Internal Address – Start Bit – Device Address (with read) – Response 0 - … - Response N – Stop Bit, but on the I2C bus I get Start Bit - Device Address - Internal Address– Device Address (with read) – Start Bit – Response 0. My read function is:

// Set the bus in master and transmitter mode and set the START condition

I2C->MDR |= I2C_MASTER | I2C_TRANSMITTER | I2C_START_COND;

// Send the slave address

i2cSendByte(I2C, slaveDeviceAddress);

// Send the internal address

i2cSendByte(I2C, (Uint8)readAddress);

// Set the bus in master, repeat and receiver mode and set the START condition

I2C->MDR &= ~I2C_TRANSMITTER;

I2C->MDR |= I2C_MASTER | I2C_REPEATMODE | I2C_START_COND;

// Send the slave address (for reading)

i2cSendByte(I2C, slaveDeviceAddress | 0x01);

// Receive n-1 bytes

while (readLength > 1)

{

  *readBuffer++ = i2cReceiveByte(I2C);

  readLength--;

}

// Receive the last bytes (and set the STOP condition)

I2C->MDR |= I2C_STOP_COND;

*readBuffer = i2cReceiveByte(I2C);

// Wait until the bus isn't busy and the master mode bit is cleared

while (I2C->STR & I2C_BUSBUSY);

while (I2C->MDR & I2C_MASTER);

  • Hi Daniel,

    Your question has been forwarded to our I2C expert. We will get back to you as soon as possible.

    Regards, Sunil

  • Know nothing about the TMS570. My guess is that  you are turning off transmit too early. These lines

    // Set the bus in master, repeat and receiver mode and set the START condition
    I2C->MDR &= ~I2C_TRANSMITTER;
    I2C->MDR |= I2C_MASTER | I2C_REPEATMODE | I2C_START_COND;
    // Send the slave address (for reading)
    i2cSendByte(I2C, slaveDeviceAddress | 0x01);

    should be:

    // Send another start bit.
    I2C->MDR |= I2C_MASTER | I2C_START_COND;
    // Send the slave address (for reading)
    i2cSendByte(I2C, slaveDeviceAddress | 0x01);
    // Switch to receive.
    I2C->MDR &= ~I2C_TRANSMITTER;

    Judging from the data sheet, I don't think I2C_REPEATMODE needs to be used. Also, usually the last byte received is usually not ACKed by the master. I suspect there is another way to code this using I2C APIs without free data format and handle the last ACK.

  • I already tried your sequence for reading, but doing so I don’t get the second start bit at all! Do you have any I2C example for the TMS570 than the delivered with HALCoGen version 3.00.00 (send and receive done over the internal loopback)?

  • Sorry to hear that did not work. No experience with TMS570 and HalCoGen. I don't see FDF often. Not familiar with it. The I2C controller in the TMS570 looks similiar to controllers in all of TI's ARM processors. I2C code from those processors can be used a reference. I am guessing that  code that uses the non-FDF mode would be something like this:

    /* Assumes I2CMDR.RM =0 and I2CMDR.FDF = 0 */
    I2C->SAR  = slaveDeviceAddress>>1;// 7-bit address
    I2C->MDR |= I2C_MASTER;

    I2C->CNT  = 1;
    I2C->DXR  = (Uint8)readAddress;
    I2C->MDR |= I2C_TRANSMITTER | I2C_START_COND;
    while (I2C->STR & I2C_BUSBUSY);

    I2C->CNT  = readLength;
    I2C->MDR &= ~I2C_TRANSMITTER;
    I2C->MDR |= I2C_START_COND | I2C_STOP_COND;

    while(readLength)
    {
      while (I2C->STR & I2C_RXRDY);
      *readBuffer++ = I2C->DRR;
      readLength--;
    }

    while (I2C->STR & I2C_BUSBUSY);
    while (I2C->MDR & I2C_MASTER);

    The I2C state machine automatically handles the start/address and stop parts.

    That's all I got. Hopefully Sunil Oak's I2C expert will respond soon.

    EDIT: Forgot to convert 8-bit address to 7 bit-address

  • Daniel,

    I'm preparing a sample I2C data transfer code for TMS570 . Hope it will help.

    - Pratip

  • Hi Daniel,

    I had a look into your case where you are trying to write and read from Microchip 24AA01 EEPROM.

    Looks like you need not have to be in FDF mode to communicate with it , you can try with repeat mode ON and set appropriate Salve Address if you need the following format both for write and read operations:

    Start Bit - Device Address - Internal Address – Start Bit – Device Address (with read) – Response 0 - … - Response N – Stop Bit,

    i2cREG1->SAR = sadd;

    i2cREG1->MDR |= RepeatMode

    You can keep the I2CMDR.BC  = 0 and I2CMDR.FDF = 0 . By the way Halcogen doesn't support FDF format at the moment.

    This should generate a start bit for each byte of data transfer.

    if I'm refering the right datasheet from microchip the slave address needs to be

    (Edit:) 0xA0   (i.e) 1010XXX

    Do give this a shot and let me  know how it moves.

    I apologise if there has been much of a delay from us to give you any help.

    - Pratip

     

     

     

  • Hi Pratip

     The slave address of the EEPROM is 0xA0 [from Microchip 24A001 data sheet]:

    I have already tried with FDF = 0, RM = 0 and RM = 1, but I had no success with both combinations L

    I can successfully write in the EEPROM (the EEPROM acknowledges my commands and data), but only with FDF = 1, RM = 0 and BC = 0.

    The EEPROM is the only device on the I2C bus.

    I also noticed that the bus frequency is set incorrectly by HALCoGen. I would like to have a bus speed of 100 kHz:
    - HALCoGen sets PSC = 9 and CLKH = CLKL = 0x1E => 113.6 kHz
    - I calculated PSC = 9 and CLKH = CLKL = 0x23 => 100 kHz

    - Daniel

  • Daniel,

    Yes the slave add is 0xA0 .Since the slave expects a start condition on each byte I expect the RM to be ON.

    Let me have a closer look.

    - Pratip

  • Daniel,

    1. In the FDF , direction cannot be changed throught out that transfer. If FDF works for you , could you try with few consecutive writes followed by consecutive  reads.

    2. While using RM , my concern is the way we switch from write to read  , refer the link  I2C Tips .

    3. I guess you could also try with RM=0 and try sending one word at a time by setting STT each time

     and set the I2CCNT : i2cREG1->CNT = cnt;

    See if the attached file helps.4747.i2c.c

    Once I have my hardware up , I can send you some verified sample codes.

    I''ll be looking forward for your observations !!!!

    - Pratip

  • Hi Daniel,

    Were you able to read from  the EEPROM ?

    - Pratip

  • Hi Daniel,

    Try with the attached file and see if it helps. I'll close on this ticket , you may raise a new one if you need further help.

    7635.i2c.zip

    -Pratip

  • Pratip

     I’m back from vacation ;-)

     With the I2C Tips <http://processors.wiki.ti.com/index.php/I2C_Tips> I could solve the problems with the I2C! I have configured the I2C with RM=0, FDF=0 and SAR=0x50 (=0xA0>>1).

     I have seen that you are using HALCoGen version 03.01.00, I still have version 03.00.00! Is the newer version already available, or when will it be?

    Thanks Daniel

  • Daniel,

    I'm glad that the I2C tips page helped solve your issue!  HALCoGen 3.01 is a TI internal release.  The next HALCoGen update will happen 1H2012.

  • I would like to know what is the purpose of the SAR register if, anyway, we have to send it in each message:

    «

    ...

    // Send the slave address

    i2cSendByte(I2C, slaveDeviceAddress);   

    ... 

    » 

    What it is handled exactly by the i2c controller? The ACK? The slave address?

    I have generated the Halcogen code, it`s fine but I still don't know how to use it. It doesn't work.

    I communicate as a Master to a single slave (light transmitter ISL76683 from TI). Do you have some example? (Other than from Halcogen).

    Simon 

  • Hmmm...no response from the TI guys.  Some guesses. The SAR is not used when the controller is in Free Data Format mode. In that mode you must manage the entire transaction. In the non FDF mode, SAR is used by I2C controller to automatically send the start bit, slave address and read/write bit automatically.

  • Hi Simon

    If you configured the Free Data Format = 0, then in the SAR register you have to set the device's slave address. I had to shift the address 1 bit to the right (slave address = 0xA0, SAR = 0x50)! In FDF = 0, i2cSendByte(I2C, slaveDeviceAddress); isn't necessary, it is handled by the I2C HW.

    I had to correct the initialization (i2cInit()) generated by HALCoGen:
       i2cREG1->MDR = /* nack mode                          */   (0)
                      /* free running                       */ | (0)
                      /* start condition - master mode only */ | (0)
                      /* stop condition                     */ | (I2C_STOP_COND)
                      /* Master/Slave mode                  */ | (I2C_MASTER)
                      /* Transmitter/receiver               */ | (I2C_TRANSMITTER)
                      /* expanded address                   */ | (I2C_7BIT_AMODE)
                      /* repeat mode                        */ | (0)
                      /* digital loopback                   */ | (0)
                      /* start byte - master only           */ | (0)
                      /* free data format                   */ | (0)
                      /* bit count                          */ | (0); // 8 bits

    and (for 100kHz)
       i2cREG1->CLKH = 0x23;
       i2cREG1->CLKL = 0x23;

    Ciao Daniel

  • Thanks for your response Daniel.

    Still some problem tough the chip responds, it acks but at the end my clock signal stays low, so it hangs there. The device address is sent correctly, I see it on the scope.

    I'm just trying to read as master mode, I performe a single read. I configure the clock around 10Khz. This is the sequence, sorry it's a little bit to read:

     //********************** Begin Init
    
     I2cRegsSt::I2cmdr mdr;
     mdr.all = 0;
     mdr.bit.nIRS = 0; //I2C reset.
     i2cPtr->i2cmdr.all = mdr.all; //Apply change.
    
     //mdr.bit.STT = 1; //start condition - master mode only
     mdr.bit.STP = 1; //stop condtion
     mdr.bit.MST = 1; //Master/Slave mode
     mdr.bit.TRX = 1; //Transmitter/receiver
     //mdr.bit.DLB = 1; //Loopback.
     mdr.bit.BC = I2C_8_BIT; //Bit count.
    
     //Apply change.
     i2cPtr->i2cmdr.all = mdr.all; //Still in reset at this point.
    
     /** - Disable all interrupts */
     //HALCOGEN i2cREG1->IMR = 0x7FU; // ??????????
     i2cPtr->i2cimr.all = 0;
    
     ////Config clock around 10Khz.
     i2cPtr->i2cpsc.all = 0;
     i2cPtr->i2cpsc.bit.PSC = 10; //Set prescale.
    
     //set clock rate.
     i2cPtr->i2cckh.all = 0;
     i2cPtr->i2cckh.bit.CLKH = 393;
     i2cPtr->i2cckl.all = 0;
     i2cPtr->i2cckl.bit.CLKL = 393;
    
     //set i2c pins functional mode.
     i2cPtr->i2cpfnc.all = 0;
     i2cPtr->i2cpfnc.bit.PINFUNC = 0;
    
     //set i2c pins default output value
     I2cRegsSt::I2cdout i2cdout;
     i2cdout.all = 0;
     i2cdout.bit.SCLOUT = 1;
     i2cdout.bit.SDAOUT = 1;
     i2cPtr->i2cdout.all = i2cdout.all; //Apply change.
    
     //set i2c pins output direction.
     I2cRegsSt::I2cpdir i2cpdir;
     i2cpdir.all = 0;
     i2cpdir.bit.SCLDIR = 1;
     i2cpdir.bit.SDADIR = 1;
     i2cPtr->i2cpdir.all = i2cpdir.all; //Apply change.
    
     //set i2c pins open drain enable.
     I2cRegsSt::I2cpdr i2cpdr;
     i2cpdr.all = 0;
     i2cpdr.bit.SCLPDR = 0;
     i2cpdr.bit.SDAPDR = 0;
     i2cPtr->i2cpdr.all = i2cpdr.all; //Apply change.
    
     //set i2c pins pullup/pulldown enable.
     I2cRegsSt::I2cpdis i2cpdis;
     i2cpdis.all = 0;
     i2cpdis.bit.SCLPDIS = 0;
     i2cpdis.bit.SDAPDIS = 0;
     i2cPtr->i2cpdis.all = i2cpdis.all; //Apply change.
    
     //set i2c pins pullup/pulldown select.
     I2cRegsSt::I2cpsel i2cpsel;
     i2cPtr->i2cpsel.all = 0;
     i2cpsel.bit.SCLPSEL = 1;
     i2cpsel.bit.SDAPSEL = 1;
     i2cPtr->i2cpsel.all = i2cpsel.all; //Apply change.
    
     //set interrupt disable.
     i2cPtr->i2cimr.all = 0;
    
     mdr.bit.nIRS = 1; // I2C out of reset.
     i2cPtr->i2cmdr.all = mdr.all; //Apply change.
    
     //********************** End of Init
    
     //Set slave address.
     i2cPtr->i2csar.bit.SA = 0x44;
    
     //Set in receive mode.
     I2cRegsSt::I2cmdr mdr;
     mdr.all = i2cPtr->i2cmdr.all;
     mdr.bit.TRX = 0; //Transmitter/receiver bit.
     mdr.bit.MST = 1; //Master/Slave mode
     mdr.bit.STP = 1; //stop condition - master mode only
     i2cPtr->i2cmdr.all = mdr.all; //Apply change.
    
     //Send register to read.
     while (i2cPtr->i2cstr.bit.TXRDY == 0) //wait.
     {} //Blank line.
    
     i2cPtr->i2cdxr.bit.DATATX = 4; //Register is 4 for this chip.
    
     //Set start condition.
     I2cRegsSt::I2cmdr mdr;
     mdr.all = i2cPtr->i2cmdr.all;
     mdr.bit.STT = 1; //start condition - master mode only
     i2cPtr->i2cmdr.all = mdr.all; //Apply change.
    
     //Receive.
     while( ! ((i2cPtr->i2cstr.bit.RXRDY) || (i2cPtr->i2cstr.bit.ARDY)) )
     {} //Blank line. Wait.
    
     // If a NACK occurred then SCL is held low and STP bit cleared
     if ( i2cPtr->i2cstr.bit.NACK )
     {
     // send STP to end transfer.
     I2cRegsSt::I2cmdr mdr;
     mdr.all = i2cPtr->i2cmdr.all;
     mdr.bit.STP = 1;
     i2cPtr->i2cmdr.all = mdr.all; //Apply change.
    
     // clear NACK bit.
     I2cRegsSt::I2cstr str;
     str.all = i2cPtr->i2cstr.all;
     str.bit.NACK = 1;
     i2cPtr->i2cstr.all = str.all; //Apply change.
     *error = True;
     return 0;
     }
    
     //Read the data.
     return i2cPtr->i2cdrr.bit.DATARX;

     

  • Sorry for the late answer!

    Here the errors I found in the initialization:
    mdr.bit.BC = 0;
    i2cPtr
    ->i2cpfnc.bit.PINFUNC = 0;

    And for read:
    I set the CNT register with the number of bytes to read.

  • Great, the fix is on the CNT register, it works now. My mdr.bit.BC was already 0.

    Thanks so lot.

    Simon 

  • Hello Daniel,

    Since your code is working smoothly , could you please share the code as I am also working on I2C protocol with the TMS570 3137 evaluation board.

    Thanks.

  • Hi Ryne

    If you find any bugs, let me know ;-)

    void I2cDriver_init(void)
    {
       i2cInit();
    }

    void I2cDriver_write(Uint8 slaveDeviceAddress, Uint32 writeAddress, Uint8 const * writeBuffer, Uint32 writeLength)
    {
       // Something to do?
       if (writeLength > 0)
       {
          assert(writeBuffer);
          
          // Wait until the slave device is not busy
          waitWhileDeviceIsBusy(slaveDeviceAddress);

          // Disable I2C during configuration
          I2C->MDR = 0;

          // Configure the I2C controller
          I2C->CNT = writeLength + 1; // + 1 bytes for the internal address
          I2C->SAR = (Uint32)slaveDeviceAddress >> 1;
          I2C->MDR = I2C_RESET_OUT | I2C_START_COND | I2C_STOP_COND | I2C_TRANSMITTER | I2C_MASTER;

          // Send the internal address
          if (sendByte((Uint8)writeAddress) == FALSE)
          {
             return;
          }

          // Transmit the data
          while (writeLength)
          {
             writeLength--;
             if (sendByte(*writeBuffer++) == FALSE)
             {
                return;
             }
          }

          // Wait until the bus isn't busy and the master mode bit is cleared
          while (I2C->STR & I2C_BUSBUSY);
          while (I2C->MDR & I2C_MASTER);
       }
    }

    void I2cDriver_read(Uint8 slaveDeviceAddress, Uint32 readAddress, Uint8 * readBuffer, Uint32 readLength)
    {
       // Something to do?
       if (readLength > 0)
       {
          assert(readBuffer);

          // Wait until the slave device is not busy
          waitWhileDeviceIsBusy(slaveDeviceAddress);

          // Disable I2C during configuration
          I2C->MDR = 0;

          // Configure the I2C controller as transmitter
          I2C->CNT = 1; // 1 byte for the internal address
          I2C->SAR = (Uint32)slaveDeviceAddress >> 1;
          I2C->MDR = I2C_RESET_OUT | I2C_START_COND | I2C_TRANSMITTER | I2C_MASTER;

          // Send the internal address
          if (sendByte((Uint8)readAddress) == FALSE)
          {
             return;
          }

          // Wait for ARDY before beginning the read phase
          while ((I2C->STR & I2C_ARDY_INT) == 0);

          // Configure the I2C controller as receiver
          I2C->CNT = readLength;
          I2C->MDR = I2C_RESET_OUT | I2C_START_COND | I2C_STOP_COND | I2C_MASTER;

          // Receive the data
          while (readLength)
          {
             readLength--;
             if (receiveByte(readBuffer++) == FALSE)
             {
                return;
             }
          }

          // Wait until the bus isn't busy and the master mode bit is cleared
          while (I2C->STR & I2C_BUSBUSY);
          while (I2C->MDR & I2C_MASTER);
       }
    }

    // Function which has to be implemented for the generated code from HALCoGen
    void i2cNotification(i2cBASE_t *i2c, Uint32 flags)
    {
    }

    static void waitWhileDeviceIsBusy(Uint8 slaveDeviceAddress)
    {
       // Wait until the bus is not busy
       while (I2C->STR & I2C_BUSBUSY);

       // Disable I2C during configuration
       I2C->MDR = 0;

       // Configure the I2C controller as transmitter in repeat mode
       I2C->SAR = (Uint32)slaveDeviceAddress >> 1;
       I2C->MDR = I2C_RESET_OUT | I2C_TRANSMITTER | I2C_REPEATMODE;

       // Wait until the slave device acknowledges its address
       while (TRUE)
       {
          // Set the START condition
          I2C->MDR |= I2C_START_COND | I2C_MASTER;

          // Wait for the ARDY flag
          while ((I2C->STR & I2C_ARDY_INT) == 0);

          // Set the STOP condition
          I2C->MDR |= I2C_STOP_COND;

          // Wait until the bus isn't busy and the master mode bit is cleared
          while (I2C->STR & I2C_BUSBUSY);
          while (I2C->MDR & I2C_MASTER);

          // Check if the slave address is acknowledged
          if ((I2C->STR & I2C_NACK_INT) == 0)
          {
             // Slave address ACKed; the slave device is ready again
             return;
          }
          else
          {
             // Slave address NACKed (clear the NACK bit)
             I2C->STR |= I2C_NACK_INT;
          }
       }
    }

    static Boolean sendByte(Uint8 byte)
    {
       // Wait for the TXRDY flag to transmit data or ARDY if we get NACKed
       while ((I2C->STR & (I2C_TX_INT | I2C_ARDY_INT)) == 0);

       // If a NACK occurred then SCL is held low and STP bit cleared
       if (I2C->STR & I2C_NACK_INT)
       {
          // Reset the I2C
          I2C->MDR = 0;
          return FALSE;
       }

       i2cREG1->DXR = byte;
       return TRUE;
    }

    static Boolean receiveByte(Uint8 * byte)
    {
       // Wait for the RXRDY flag to transmit data or ARDY if we get NACKed
       while ((I2C->STR & (I2C_RX_INT | I2C_ARDY_INT)) == 0);

       // If a NACK occurred then SCL is held low and STP bit cleared
       if (I2C->STR & I2C_NACK_INT)
       {
          // Reset the I2C
          I2C->MDR = 0;
          return FALSE;
       }

       // Make sure that the RXRDY flag is set
       while ((I2C->STR & I2C_RX_INT) == 0);

       *byte = (Uint8)I2C->DRR;
       return TRUE;
    }

    Modified HALCoGen init:

    void i2cInit(void)
    {
    /* USER CODE BEGIN (3) */
    /* USER CODE END */
        uint32_t bit_count = I2C_8_BIT;


        /** @b intialize @b I2C */

        /** - i2c out of reset */
        i2cREG1->MDR = (1 << 5);

        /** - set i2c mode */
        i2cREG1->MDR = /* nack mode                         */   (0 << 15)                           
                       /* free running                      */ | (0 << 14)                           
                       /* start condtion - master mode only */ |  0                           
                       /* stop condtion                     */ | (1 <<11)
                       /* Master/Slave mode                 */ | (1 <<10)
                       /* Transmitter/receiver              */ | (I2C_TRANSMITTER)    
                       /* xpanded address                   */ | (I2C_7BIT_AMODE)
                       /* repeat mode                       */ | (0 << 7)
                       /* digital loopback                  */ | (0 << 6)                           
                       /* start byte - master only          */ | (0 << 4)
                       /* free data format                  */ | (0)
                       /* bit count                         */ | (bit_count);


        /** - set i2c extended mode */
        i2cREG1->EMDR = (0 << 25);

        /** - set i2c data count */
        i2cREG1->CNT = 1;

        /** - disable all interrupts */
        i2cREG1->IMR = 0x00U;    

        /** - set prescale */
        i2cREG1->PSC = 9;

        /** - set clock rate */
        i2cREG1->CLKH = 35;
        i2cREG1->CLKL = 35;

        /** - set i2c pins functional mode */
        i2cREG1->FUN = (1 );

        /** - set i2c pins default output value */
        i2cREG1->DOUT = (0 << 1) /* sda pin */
                      | (0);     /* scl pin */

        /** - set i2c pins output direction */
        i2cREG1->DIR = (0 << 1)   /* sda pin */
                     | (0);       /* scl pin */

        /** - set i2c pins open drain enable */
        i2cREG1->ODR = (0 << 1)   /* sda pin */
                     | (0);       /* scl pin */

        /** - set i2c pins pullup/pulldown enable */
        i2cREG1->PD = (0 << 1)  /* sda pin */
                    | (0);      /* scl pin */

        /** - set i2c pins pullup/pulldown select */
        i2cREG1->PSL = (1 << 1)    /* sda pin */
                     | (1);        /* scl pin */

        /** - set interrupt enable */
        i2cREG1->IMR    = (0 << 6)           /* Address as slave interrupt      */
                        | (0 << 5)           /* Stop Condition detect interrupt */
                        | (0 << 4)  /* Transmit data ready interrupt   */
                        | (0 << 3)  /* Receive data ready interrupt    */
                        | (0 << 2)    /* Register Access ready interrupt */
                        | (0 << 1)    /* No Acknowledgement interrupt    */
                        | (0);          /* Arbitration Lost interrupt      */
        
        i2cREG1->MDR |= I2C_RESET_OUT; /* i2c out of reset */
        
        /** - inialise global transfer variables */
        g_i2cTransfer[1].mode   = 0 << 8;
        g_i2cTransfer[1].length = 0;

    /* USER CODE BEGIN (4) */
        /** - Reset I2C */
        i2cREG1->MDR = 0;

        /** - Set I2C mode */
        i2cREG1->MDR = /* nack mode                          */   (0)
                       /* free running                       */ | (0)
                       /* start condition - master mode only */ | (0)
                       /* stop condition                     */ | (I2C_STOP_COND)
                       /* Master/Slave mode                  */ | (I2C_MASTER)
                       /* Transmitter/receiver               */ | (I2C_TRANSMITTER)
                       /* expanded address                   */ | (I2C_7BIT_AMODE)
                       /* repeat mode                        */ | (0)
                       /* digital loopback                   */ | (0)
                       /* start byte - master only           */ | (0)
                       /* free data format                   */ | (0)
                       /* bit count                          */ | (0);

        /** - set i2c pins functional mode */
        i2cREG1->FUN = (0 );

        /** - I2C out of reset */
        i2cREG1->MDR |= I2C_RESET_OUT;

        /** - initialize global transfer variables */
        g_i2cTransfer[0].mode   = 0 << 8;
        g_i2cTransfer[0].length = 0;
        g_i2cTransfer[0].data   = NULL;
        g_i2cTransfer[1].mode   = 0 << 8;
        g_i2cTransfer[1].length = 0;
        g_i2cTransfer[1].data   = NULL;
    /* USER CODE END */

    }

  • Hello Daniel,

    Thank you for sharing the I2C protocol structure. Could you please tell me what is "assert(writeBuffer); " function does. It is not written here.

    Thanks,

    Ryne

  • You are welcome!

    assert(writeBuffer) is equivalent to assert(writeBuffer != NULL). So I just check whether the writeBuffer is not NULL.

  • Hello Daniel,

    My slave address is 0x0000 and internal address is 0x02F8. Since you are using "sendByte((uint8_t)readAddress)", how can I send rest of the address bits of 0x02F8 as 8bits wont cover the whole address bits.

    Thanks.

    Ryne.

  • And another question is what are we supposed to send in writeBuffer ( sendByte(*writeBuffer++) )?

    Thanks

    Ryne

  • sendByte((uint8_t)(readAddress >> 8));
    sendByte((uint8_t)readAddress);

  • Daniel Dueringer said:

    Pratip

     I’m back from vacation ;-)

     With the I2C Tips <http://processors.wiki.ti.com/index.php/I2C_Tips> I could solve the problems with the I2C! I have configured the I2C with RM=0, FDF=0 and SAR=0x50 (=0xA0>>1).

     I have seen that you are using HALCoGen version 03.01.00, I still have version 03.00.00! Is the newer version already available, or when will it be?

    Thanks Daniel

    Hi, Daniel

    I'm using RM48 with 24AA02E48.

    Could you send me 24AA01 sample code?

     

    Thank you, Daniel

     

    Seongjin Jeong

  • Hi Jeong

    I'm using the same EEPROM. The code I posted here (http://e2e.ti.com/support/microcontrollers/hercules/f/312/p/163123/675680.aspx#675680) on May 14, 2012 works.

    Daniel