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External sdram access time issue

Other Parts Discussed in Thread: HALCOGEN

Hello

I measured access times to read/write whole memory(64MB external sdram), but the result is little strange. The read time is twice the write time. Is it normal situation? I think that the write time is twice the read time normaly. The sdram configurations are configured properly in HALCoGen.

Best Regards.

.

  • Hi,

    How did you measure this. Looking at pins and counting nano-seconds or looking at a performance counter / timer and counting cycles.

    Reads take longer in the latter case because the processor has to wait for data to be returned from the SDRAM. Whereas to some extent the write is 'fire and forget'. You also have a write buffer in the CPU to speed this path up. So it would be normal to see writes to SDRAM much faster than reads.
  • Hello

    It is measured by pmu cycle, so it is make a sense with your reply. Can I get another result if I use scope or other measurment ways?

    How about non volatile memory as mram? There is a non-volatile memory(mram) in my system and it has a bigger time writing than reading. What is difference?

    Best Regards,

    Wonjae Kim

  • Hi Wonjae,

    I think if you measure with a scope - you are measuring something different. That's why I asked. In that case you would be measuring only the time the read & write occupies the EMIF, and not the entire transaction.

    I'm not really sure about mram - would need to understand it better. If you are using the ASYNC EMIF interface for this there is a WAIT input that can be used to extend the access time almost indefinitely (there's a timeout I think but it can be a long time) and there is a separate timing register for writes versus reads so even there you could have writes setup to take a lot more cycles than reads.