Lock of debug

Sorry, I forget to menation that I am using the RM46L852

A.F riebel

Hi Arne,

I want to lock the debug port, so I have to set a 128 bit value of zeros to the OTP address 0xF000 0000.

Yes

To which region does this area belong to ? (it is out of area of bank 0 or bank 7)

Bank 0, see section 4.9.2 Memory Map Table:

What kind of memory is this ? (Flash with ECC, OTP without ECC, EEPROM)

It's OTP, with ECC protection (See above table for ECC area at 0xF004000 as well...

I believe the ECC is enabled separately though - check the FEDACCTRL1 register.

How must I set the waitstates ?

I don't think you have any additional settings for OTP wait states, just make sure the flash wait states are set correctly.

How is it programmed ?

You would use the F021 Flash API.  It should be included as an optional install w. HalCoGen.

How do I have to set the FBSE register ?

You need to use the F021 Flash API versus writing directly to the flash registers.

Arne,

Did this answer the questions you had?

Dear Mr. Seely,

you told me, that the area 0xF000 0000 belongs to the bank 0. But the bank 0 is located in the RM46L852 manual (table 4-23) from address 0x000 0000 - 0x0013 FFFF. So whats correct ?

In the table on page 78 for the flash module Bus 2 interface bank 7 is written down on different rows(RM46L852 Manual), with a few exceptions. The range 0xF000 0000 - 0xF000 1FFF is named with Customer OTP, TCM Flash Banks, but here is no bank7 additional remark, so to which region does this area belong.

I do not find any hint of memory map for this range. (0xF000 0000 - 0xF00 1FFF)

What kind of range is where ?  (OTP, TCM Flash Banks)

Are you sure that the register at address 0xF000 0000 is ECC protected within the same memory range. In the Figure 4-10 (RM46L852 manual) this area is named as Flash ECC area. Please tell me at which adress, I have to programm the ECC of this address (0xF000 0000)

What happen if the OTP value of the debug lock port is not set to all zero value. This leads to one ECC value. If than a new value with more zeros is programmed how about the ECC ? (Is this also an OTP value or not)

Ti described here three different memory types Flash, EEPROM and OTP.  Within the register setting the RWAIT value is used for the flash, the EWAIT value is used for the bank 7. So how is the address 0xF000 0000 programmed ?

The F021 Flash API contains of a libery which not contain the source files. So it is not possible to integrate this in my software. Also with the F021 Flash API it is possible to programm the bank0 and bank7, but 0xF000 0000 ?

Please send me the source files of the F021 or a flow char for programming Flash, EEPROM and OTP.

Please comment FEMU_ADDR

"this register contains the upper 19 bits of the 83 bit data used to calculate the ECC"

This is an address and what is meant with 83 bit data ??

In the SPNA148 3.2.2 there is an example in which die FEMU_ADDR is written, but here it is not the upper address value, its the lower one.

Best regards

A. Friebel

Arne,

you told me, that the area 0xF000 0000 belongs to the bank 0. But the bank 0 is located in the RM46L852 manual (table 4-23) from address 0x000 0000 - 0x0013 FFFF. So whats correct ?

This is correct, but it applies to the main sectors of bank 0.   The OTP area is a special sector that you are not able to erase once you program it.  (Hence OTP=One time programmable). The OTP sector of bank 0 is mapped to the address range mentioned in the previous post,  starting at 0xF0000000.   The bank really refers to the physical / structural location of the sector.  Not the logical address.

In the table on page 78 for the flash module Bus 2 interface bank 7 is written down on different rows(RM46L852 Manual), with a few exceptions. The range 0xF000 0000 - 0xF000 1FFF is named with Customer OTP, TCM Flash Banks, but here is no bank7 additional remark, so to which region does this area belong.

  Bank0.   Bank 0 is tightly coupled to the CPU which is what TCM stands for.

I do not find any hint of memory map for this range. (0xF000 0000 - 0xF00 1FFF)

What kind of range is where ?  (OTP, TCM Flash Banks)   Is this a separate question or is it answered by the previous answer? 

Are you sure that the register at address 0xF000 0000 is ECC protected within the same memory range. In the Figure 4-10 (RM46L852 manual) this area is named as Flash ECC area. Please tell me at which adress, I have to programm the ECC of this address (0xF000 0000)

  Not really sure about this question either - but I'll try to answer.   The Customer OTP (data) area is located at address 0xF000_0000 per the table on page 78.   The ECC syndromes that protect this data are programmed into memory at address 0xF0040000. 

What happen if the OTP value of the debug lock port is not set to all zero value. This leads to one ECC value. If than a new value with more zeros is programmed how about the ECC ? (Is this also an OTP value or not)

  The memory is one time programmable - so you are not supposed to try to program additional zeros.   While I suppose you could try - as you point out a 1->0 transition in the data might require a 0->1 transition in the ECC syndrome which is not possible since the erase mechanism is disabled.

Ti described here three different memory types Flash, EEPROM and OTP.  Within the register setting the RWAIT value is used for the flash, the EWAIT value is used for the bank 7. So how is the address 0xF000 0000 programmed ?

  All of these areas are FLASH type memory.   Note that we do not say we have EEPROM memory.   We say "64KB of Flash for Emulated EEPROM"    EEPROM emulation with flash is implemented with the assistance of an API that ships with HalCoGen - the FEE.   OTP is also Flash memory but the erase mechanism has been disabled so you can only program it one time.  It is also implemented as a separate physical bank so that you can operate on it (bank 7) while still executing code from the main bank (bank 0).   

The F021 Flash API contains of a libery which not contain the source files. So it is not possible to integrate this in my software. Also with the F021 Flash API it is possible to programm the bank0 and bank7, but 0xF000 0000 ?

Please send me the source files of the F021 or a flow char for programming Flash, EEPROM and OTP.   This requires a special agreement, but I will find the details out about how to put this agreement in place and get back to you.  The main concern is that you might compromise the effectiveness of the programming algorithm by rebuilding the code from sources, and if this were to cause a problem say with data retention - who is responsible.   For this reason I'd still recommend using the pre-built library form and just using the sources for the purpose of inspection.

Please comment FEMU_ADDR

"this register contains the upper 19 bits of the 83 bit data used to calculate the ECC"

This is an address and what is meant with 83 bit data ??

In the SPNA148 3.2.2 there is an example in which die FEMU_ADDR is written, but here it is not the upper address value, its the lower one.

Good observation.   Please see section 5.3.2 of the TRM for a detailed explanation.

See how (underlined) bit 7 of the ECC syndrome is the XOR of address bits [9:3] as well as data bits [55:40], [31:24], [7:0].

This provides additional protection on faults associated with the address decode logic of the memory system.  83 bits comes from 64 bits of data + 19 bits of address being included in the calculation of the ECC syndrome.

These are the 'upper' bits of the syndrome equation but yes they are lower order address bits [21:3] ... the bits that are significant when it comes to decoding a location within flash.

Thanks and Best Regards,

Anthony

Dear Mr. Seely,

with my last Questions I try to figure out, how to program the OTP at 0xF000 0000 for locking the JTAG port.  I think with the information of the manual SPNU514A -Sept. 13 it is not possible for me to do this. I think without help noboby could be success this topic. So the manual will not be good enough for this.

I am still wondering, that there will be no flow charts for programming, it is not possible to see what setting must be done for programming and as you write me it seems to be a secret regarding the code of the F021 software.

So again, please tell me the settings of the control registers for programming the 0xF000 0000 and tell me how the programming should be done.

Best regards A. Friebel

Hi Arne,

I agree and its intentional that the flash programming registers and flowcharts are not documented.
The first option we think customers should take is to use the TI provided F021 API rather than trying to write your own flash programming code.

Thanks for the reminder, I am checking again today about what the procedure is if you need access to the API sources.

Best Regards,
-Anthony

Arne,

We will setup a way for you to get access to the sources of the API.

You will need to login with your my.ti.com account and there is a site called 'mySecureSoftware' that you'll go to in order to access the code.  

Please note that the license agreement that you will need to agree to says the following:

a. Limited Source Code License.  Subject to the terms of this Agreement, TI hereby grants to Licensee a royalty-free, fully paid-up, non-transferable, non-exclusive, non-assignable, non-sub-licensable license to make copies, display internally and use internally the Licensed Materials provided to Licensee for the sole purpose of reviewing such Licensed Materials for use solely and exclusively with the Licensee Product and solely for verification, certification and debug of such Licensee Product. Use of the Licensed Materials to develop executable versions is not permitted under this Agreement.  Further, any use of such executable version with a TI Device voids the Flash Memory specifications for such TI Device, as any such use of executable versions Licensee develops based on any portion of such source code, or any derivative thereof, may not operate correctly with a TI Device.

 Edit:   In addition please specify if you need the source for a particular version of the F021 API.   Otherwise by default the current version source will be sent.

Dear Mr. Seely,

well, I am a little surprised. This device (RM46) is a security device, so linking unknown object files in my source code can produce a lot of trouble. For me, it sounds very strange that the customer should use the F021 API, and so that the documentation will not complete. I think it should be the freedom of the customer to decide which way he wants to go. (using API or writing his own software)

If there are register settings which leads to any problems, that the device will not operate correctly, these settings should be marked in a special way with hints what to do to avoid this. If here is no documentation regarding this point, I would say that this is really not correct. (for me it is an act of careless)

The way to analyse the F021 instead of having a correct documentation is not a good way, but it seems to be the only way.

I will use the RM46L852 and you can send me the source file to my email address : arne.friebel@motrona.com

(or tell me what to do)

Best regards A. Friebel

Arne,

I need the username that you use to logon to E2E.   This is your user name that you use when you log in to make a forum post. You can email this directly to me rather than posting.  a-seely at ti dot com.

We'll then authorize this username for the download and send information to the email that you provided with instructions on what to do next.  You need to get the library through the system, sorry I can't just email it to you directly.   I haven't used this system myself for this library but I believe it's the same system you have seen if you downloaded CCS.

It's hard to really explain this briefly, but please understand that the issue here is not one of restricting your freedom or of locking you in somehow.

The issue is that we have a datasheet which calls out performance specifications related to flash programming - for example the access time, data retention, and write/erase cycles.   For better or worse we do not encapsulate the entire critical sections of the programming operation in hardware so that you 'can't go wrong' by changing the API .   So controlling the API is really the only way we can easily ensure that the flash performs to spec.   The license is required to make sure the risks/responsibilities around this issue are understood.

If you really do have a valid requirement to modify the F021 API we can go another level deeper and talk to you about the work that is required to validate the performance of the variant of the API that you come up with.   But in our experience this is rarely done.   Normally the need is to have the ability to inspect the code, so as you say you are not putting a 'black box' library into your application.

I hope this explanation is enough.  It's hard to explain this briefly and clearly at the same time,  and if you have more questions it might be best to discuss over the phone.

Dear Mr. Seely,

It is very nice that TI has the F021 software, which should help the customer. But the lack of documentation and the fact that you will not get easily the source code is a restriction. So how can this be understand in another way.
The next critcal point is that the customer can not (!!!) know which parts of software or register settings, timings are important for the Flash, if this is not documented. This means for me, I am locked out.
I get the impression that the E2E Forum will be used to speed up the supply of new components with a lack of documentation.
I have send you an email with the username.
I hope that I will see a light on the end of the tunnel.

Best regards A. Friebel

Dear Mr. Seely,

I am still waiting for the F021 source files. Today it is the 29.01.15. There is nothing in my ti Account / mySecure Software.

Best regards A. Friebel