This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

RM48L952ZWT DMM, ETM and RTP modules

Hi,

  We are using the RM48L952ZWT based board. We are looking at what features we "lose" when we multiplex, etc.  Can you give more information on the for ETM (External Trace Macrocell), DMM (Data Modification Module), RTP (RAM Trace Port).  Are any of these features required i.e., for an external NAND Flash access and DMM or for i.e., debugging with OS vendor tools and RTP, etc.? Thank you.

  • Tammy,

    There is an appnote  SPNA202  that you might find useful as an overview of what you can do with ETM.

    Out of all the ports (ETM, RTP, DMM) I think you are most likely to find ETM useful;  although I'm just saying this because the company you registered under seems to be doing medical devices, and trace can be useful for collecting code coverage data.

    RTP and DMM are for high-bandwidth calibration - which might be specific to the automotive market.  It's for updating something like an engine map in real time, while the application is running.   The only tool that I am aware of that support these ports comes from Vector Informatik and they are automotive focused.

    You also have the DAP port on the JTAG connection that is capable of realtime, nonintrusive memory accesses with the CPU running.  So no problem tuning a few parameters this way.   You'd really only need RTP/DMM for large maps that have to be exchanged very quickly.

    Back to ETM, the XDS560 PROTRACE is the trace receiver that works with CCS.   It currently supports a maximum of 19 trace data pins.  So that could be a point to consider when pinmuxing.   However, looking at how we have the pinmuxing allocated,  if you use EMIF you're limiting ETM to 8 data pins.   With 8 data pins I think you can expect good program counter trace but if you turn on cycle accurate information you'll see a lot of dropouts.   And it would likely swamp the trace port if you turned on data trace w. only 8 bits. 

    The trace port runs at VCLK/2 or CPU/4 - so for your RM48 at 200MHz that's going to be 50Mhz but DDR.  So 800MBps raw bandwidth.  That should be enough for PC trace assuming your code branches less than say 1 out of every 10 cycles.  This CPU has good support for sequential execution with conditional instructions and the IF-THEN-ELSE type constructs, so I think that it is likely this will work well for you.    But if you add data trace or cycle accurate trace information it could easily swamp the interface.  There is a small on-chip FIFO to handle short peaks of trace info but I think you would find 8 bits too small a port for data trace.

    What exactly are your EMIF requirements?   You mentioned NAND flash.  Does this have to be parallel NAND our could you use a serial NAND ?  If you are using a parallel NAND and it doesn't have any address lines (just 8 data) then you could get 16 bits of trace data plus your NAND and that I think would be a decent compromise if you can't go to a serial NAND.   Just my 2 cents.

    Anyway all the above are really 'opinions' - let me know if you have any more specific questions.  

  • Hi Thank you. I will go back to hardware team on requirements for NAND Flash. But if we have a NAND flash, we have to enable/use EMIF and have that as a priority with multiplexing?
  • Tammy,

    I think it depends on the type of NAND flash. The type I'm most familiar with acts like a block-device and you write block read/write commands to it over an 8 bit data port - with no address lines required.

    If you are only putting this type of NAND on EMIF, you can mux in ETM data up to 16 before you start running into EMIF data that is required. The muxing is selectable on a pin-by-pin basis; of course you need to select a set of pins that is 'functional' and for this type of NAND that I'm thinking of it means EMIF DATA[7:0] plus a chip select and a R/W type signal would be required. These start to appear on the EMIF/ETM port after the first 16 ETM data lines...
  • Hi Thank you. We are using Micrium's NAND Flash Part # MT29F4G16ABADAWP, and according to datasheet it looks like a parallel NAND device. (http://www.micron.com/parts/nand-flash/mass-storage/mt29f4g16abadawp-it?matpart={1CA72031-4B6E-415B-B79D-F72FCBE15C2B}) So, we have a choice to put this part on EMIF or over an 8-bit data port on the RM48, but which one? What should we look for in datasheet to determine how this part will be connected to the RM48 with the hardware engineers?
  • Tammy,

    This would normally be connected to the EMIF, using the data bus plus control signals. You might choose any address line to use for the purpose of ALE - I'd pick one that doesn't conflict w. trace.

    One thing to note is Errata EMIF#4 exists for the RM48, you will need to setup the MPU properly because the NAND flash has state machines internally and won't work if there are extra accesses to it due to EMIF #4.