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HALCoGen 4.02.00 and Errata PBIST#4

Other Parts Discussed in Thread: HALCOGEN, TMS570LS3137

Hello,

In both pbistSelfCheck() and errata_PBIST_4(), there are loops to check for the execution time of the pbist.  Both have comments that say "This time is dependent on the ROMCLKDIV selected above," but the loop counters are constants in HALCoGen.

1) What is the relationship between HCLK and to execution time of pbist?

2) What is the execution time of pbist run once on RAM Group 1?

Thanks, Charlie Johnston

  • Hi Charlie,

    It will certainly change when you modify the ROM Clock divider. The numbers indicated there correspond to the clock ratio that's programmed in the System Module MSTGCR. Pls give me little more time so that I can get more details on this. Thanks.
  • Hi Karthik,
    Since HALCoGen does not adjust the loop times based on the selected ROM Clock Divider, I will have to calculate the loop times manually. To do this, I will need to know how many PMU cycles the PBIST module is expected to use when using the march13n algorithm on RAM Group 1.
    Thanks, Charlie Johnston
  • Hi Karthik,
    Let me clarify what I'm trying to do.

    In the SPNZ195D Errata for the TMS570LS3137, the Workaround for PBIST#4 states:
    "One workaround is to use a software loop to measure the execution time of the PBIST algorithm. If the execution time is much shorter than normal, ignore the results and rerun the PBIST test."

    I'm going to run the pbistSelfCheck() from HALCoGen 3.06 where it tests RAM Group 1 (PBIST ROM) with the march13n algorithm. It should fail this PBIST pass. I can satisfy PBIST#4 if I time this PBIST pass with the PMU timer, but I'll need to know what the "normal" execution time is.
    Thanks, Charlie Johnston
  • Hi Karthik,
    Any progress on this issue?
    Thanks, Charlie Johnston
  • Hi Charlie,

    I'm still talking to the designers, will get back to you as soon as possible.

    But on a first look it looks like they are covering the spread for all possible divider ranges which is the comparison range. If my assumption is right that window is fixed and the number of cycles will eventually fall in that range based on all possible divider values.

    Nevertheless I will get it confirmed from the designers and update you.
  • Hi Karthik,
    Any progress on this issue?
    Thanks, Charlie Johnston
  • Hello Charlie,

    Apologize for the delay. Will get back to you soon.
  • Hello Charlie,

    I got this confirmed by our PBIST designers and this looks like the current values are fixed for the existing default config.

    If this needs to be generic to cover all the combinations, basically the worst case is /8 and below should cover the whole spread.

    void errata_PBIST_4(void)

    if ((PBIST_wait_done_loop <= 20) || (PBIST_wait_done_loop >= 200 * 8) )

     

    void pbistSelfCheck(void)

    if (PBIST_wait_done_loop >= 2U * 8)

    This ideally needs to be adjusted based on the ROM_DIV MSTGCR.

    I will request our Halcogen team to find a best way to implement this in a generic fashion. 

  • Hi Charlie,

    HALCoGen API's harcodes the ROMCLKDIV ( 1 or 2 based on device) in pbistSelfCheck() and errata_PBIST_4() API and does the check based on this harcoded value. Could you please explain why you want to change the ROMCLKDIV value? HALCoGen configures it be the optimum value.

    Answering to your Original Questions
    1) What is the relationship between HCLK and to execution time of pbist?
    Prathap --> PBIST ROM_CLOCK is derived form HCLK ( = GCLK). All algorithms are in PBIST ROM which uses ROM_CLK as interface clock.

    2) What is the execution time of pbist run once on RAM Group 1?
    Prathap --> Please refer the PBIST RAM grouping Table in the device datasheet, March13 Cycle count details are captured here. The count values are based on the Module and Test clock ( it can be VCLK or HCLK etc..) which is also captured in the same Table.

    Easy way to calculate calculate execution time from Software perspective
    1) Configure PMU to capture cycle count
    2) pbistRun(0x00000004, (uint32)PBIST_March13N_DP) ---> For Group3 ( since Group1 and 2 cannot use march13)
    3) Wait for test to be completed
    while(pbistIsTestCompleted() != TRUE){}
    4) Read PMU to measure execution time in CPU cycles.
    5) make sure test pass :)
    if( pbistIsTestPassed() != TRUE) ???
    6) pbistStop();
  • Hi Prathap,

    Any progress on this issue?

    Thanks, Charlie

    ______________

    Hi Prathap,
    I'll rephrase my questions with some background.

    I don't want to use the HALCoGen API errata_PBIST_4(). It may be a very robust test, but it is overkill just to satisfy Errata PBIST#4.
    The Errata workaround says "... use a software loop to measure the execution time of the PBIST algorithm. If the execution time is much shorter than normal, ignore the results and rerun the PBIST test."

    I'm trying to determine the "normal" execution time in msec and the definition of "much shorter" in a mathematical expression.

    Thanks, Charlie