RM48L942 GIO High (int 9) vs GIO Low (int 23) and Triggering on Both Edges

Tammy Noergaard

Other Parts Discussed in Thread: HALCOGEN

Hi. We are using the RM48L942ZWT TI processor. We want to use GIO low (or High) with trigger on both rising edge and falling edge. In HalCoGen we can only select one. Is there a limitation in this system? There was this https://e2e.ti.com/support/microcontrollers/hercules/f/312/t/301515 where there had to be a manual change. Would this apply to us too, in order to use GIO low interrupt and enable for both rising and falling edge?

We did both below:

gioInit(); /* initialize gpio */

gioREG->INTDET = GIO_ENABLE_ALL_TRIGGER_EDGES;

where GIO_ENABLE_ALL_TRIGGER_EDGES = 0xFFFFFFFF

is this enough or is there a risk that gioREG->INTDET can be overridden by the HalCoGen gio function to set gioREG->INTDET to 00h in a later internal function call? Will this register also set repurposed other pins such as NHET pins as GIO inputs to be double edged triggered? Or does this require another step for repurposed pins being used as GIO inputs?

Thank you again.

over 8 years ago

0 Chuck Davenport over 8 years ago

TI__Guru 59540 points

Hi Tammy,

In reading your post, i am making a few assumptions. First I am assuming you are using High and Low in place of A and B as noted in the datasheet and interrupt 9 and interrupt 23 are the interrupt request lines as referenced in the interrupt request assignment table of the datasheet.

First, let me clarify that high and low in context of the interrupt request lines do not have any relation to the transition where the interrupt will occur. These are legacy names and are now termed as GIO A and B respectively. The High and Low were references to the priority since lower numbered requests are generally a higher priority than higher numbered requests.

With that said, are you configuring the interrupt under the GIO tab in halcogen to map the interrupt to the associated interupt request line? i.e., if you want the interrupt to occur on interrupt request 23, you would select the low priority interrupt in the pin configuration on the GIO tab. Also you would need to select the edge trigger as either falling or rising edge in this same area.

Note that since you want an interrupt on a GIO low state transition you would need to select the falling edge transition only in the GIO tab. You would not need to manually make the change to the GIOINTDETx field of the INTDET register as mentioned in the other post. In that post, they wanted the interrupt on both edges which cannot be configured using Halcogen.

The one part of your question that I am confused by is your statement that you are seeing interrupts on both edges. Can you check the generated code to see what is being written to the GIOINTDETx field of the INTDET register (offset 0x8) in the GIO module to insure the value written is only the falling edge or rising edge as you have configured in the GUI?

0 Tammy Noergaard over 8 years ago in reply to Chuck Davenport

Genius 3665 points

Hi Chuck. Forgive me if my question was not explained well.

1. We wanted to configure the GIOA, GIOB, and a few NHET pins as GIO input pins

2. Our engineering requirements (this phase was before my time on project) wants all inputs to be triggered by interrupts on both polarities (rising edge and falling edge). If you go to either of the GIOA or GIOB tabs. You can see in HalCoGen for GIOA/GIOB we can only select 1 with HalCoGen, not both.

2a. So that was our question, was gioREG->INTDET = 0xFFFFFFFF manually to do that Ok?

3. I was using the Names High and Low as shown in HalCoGen version 04.03.00 in the VIM Channel 0-31 tab. i.e., 9:GIO High, 23:GIO Low. 10:HET High...

4. We want a few of the NHET pins to also be GIO inputs triggered in the same way (the rest are being used for PWM).

4a. Do we enable 10: HET High to be able to get the input triggers for these HET pins?

4b Is there an equivalent register in HET as gioREG->INTDET so these are also to be triggered by interrupts on both polarities (rising edge and falling edge)?

4c. I did not see that HalCoGen autogenerated an ISR in notification.c for het where hetPORT1... (reg_het.h in HalCoGen directory) is passed, and this is what he need handled. Is there something else we need to enable in HalCoGen so we can get a HET notification function with the hetPort1 and pin passed to it that triggered the interrupt (the way the gioNotification is implemented) and ISR autogenerated function when we want to implement a HET pin as a GIO? The het function autogenerated now in notification.c does not have hetPort as an argument:

void hetNotification(hetBASE_t *het, uint32 offset)

Thank you again.

0 Chuck Davenport over 8 years ago in reply to Tammy Noergaard

TI__Guru 59540 points

Hi Tammy,

First, thanks for clarifying your question. You will find my responses below embedded in your post.

1. We wanted to configure the GIOA, GIOB, and a few NHET pins as GIO input pins

RESPONSE--> If you want to trigger on both edges you would need to manually change the initialization of the INTDET as noted in the thread you originally linked to. Note that you will want to do this in a user code section so it isn't overwritten when you use Halcogen to re-generate code.

2a. So that was our question, was gioREG->INTDET = 0xFFFFFFFF manually to do that Ok?

RESPONSE--> This shouldn't cause a problem since GIOC and GIOD don't exist in the device, but you may consider only writing to the bits for GIOA and GIOB in case you port to another Hercules device with the additional GIO ports in the future.

3. I was using the Names High and Low as shown in HalCoGen version 04.03.00 in the VIM Channel 0-31 tab. i.e., 9:GIO High, 23:GIO Low. 10:HET High...

RESPONSE--> Understood. There is a discontinuity in the naming in the interrupt table in Halcogen vs. the naming in the Datasheet. The High/Low nomenclature was an earlier terminology that has since been updated in the datasheet since it caused confusion with pin states.

4. We want a few of the NHET pins to also be GIO inputs triggered in the same way (the rest are being used for PWM).

RESPONSE for parts a, b, and c --> In general, NHET pins used as GPIO don't support interrupts. However, the Halcogen tool does a trick to use edge detection within the HET program to make it appear that the pins are functioning as GIO with interrupt capability. They are configured on the Edge 0-7 tab under the NHET tab. In this tab you can select rising, falling or both edges and assign the edge detection to an NHET pin much like the PWM tab. Under the edge interrupts tab, you can assign each of the Edge 0-7 pins to either the high or low level interrupt in addition to enabling the interrupt at the module level. Note that you will still need to enable the NHET interrupts in the VIM for these to work. You will still be able to read the state of the pins using the NHET DATAIN register as well.

4a. Do we enable 10: HET High to be able to get the input triggers for these HET pins?

4b Is there an equivalent register in HET as gioREG->INTDET so these are also to be triggered by interrupts on both polarities (rising edge and falling edge)?

0 Tammy Noergaard over 8 years ago in reply to Chuck Davenport

Genius 3665 points

0 Tammy Noergaard over 8 years ago in reply to Chuck Davenport

Genius 3665 points

Hi Chuck. Thank you. We wills et them up then as edge triggered thank you. Which Interrupts (VIM Channel levels) are assigned when we use the HET pins as Edge Triggered in HalCoGen VIM Channel tabs? Is it still i.e., HET High (10) or HET Low (24)? I enabled the edge interrupts in the under HET TAB, but what level/interrupt do we enable under the VIM table? Thank you again.

0 Chuck Davenport over 8 years ago in reply to Tammy Noergaard

TI__Guru 59540 points

The interrupts will be either the HET High (10) or HE Low (24) dependent on the interrupt level/priority you choose under the Edge Interrupt tab.

0 Tammy Noergaard over 8 years ago in reply to Chuck Davenport

Genius 3665 points

Hi Chuck. Thank you. In the HalCoGen autogenerated notifications.c file. the void edgeNotification(hetBASE_t * hetREG,uint32 edge) function is then what we assume would be the function triggered? Is there an equivalent to gioGetBit for the HET Edge Triggered ISR, where we can pass the hetREG and edge to get the value of that pin (if it is a 1 or 0)? Thank you again.

0 Chuck Davenport over 8 years ago in reply to Tammy Noergaard

TI__Guru 59540 points

Hi Tammy,

I believe if you use the gioGetBit function but pass it the hetREG base address, it will perform the same for NHET as it does for the GIO module (gioREG). I've copied Prathap, the Halcogen owner, so he can verify.

0 Tammy Noergaard over 8 years ago in reply to Chuck Davenport

Genius 3665 points

Hi Chuck (and Prathap),

So is what you mean take the edge value that is passed in notification.c in the autogenerated code, and whatever pins (terminals) we linked each of the edge triggers to, pass that to the getGIO? i.e.,

void edgeNotification(hetBASE_t * hetREG,uint32 edge)

{

/* enter user code between the USER CODE BEGIN and USER CODE END. */

/* USER CODE BEGIN (37) */

uint32 edgeCounterValue = 0;

uint8 portValue = 0;

uint32 edgeBit = 0;

if(g_printFunction && !edgeNotificationUsed)

{

edgeNotificationUsed = 1;

strcat(g_NOT_buffer, __FUNCTION__);

strcat(g_NOT_buffer, ",\r\n");

}

switch (edge)

{

case 0:

edgeBit = TERMINAL_A13_NHET1_GIO;

break;

case 1:

edgeBit = TERMINAL_A4_NHET1_GIO;

break;

case 2:

edgeBit = TERMINAL_J4_NHET1_GIO;

break;

case 3:

edgeBit = TERMINAL_K19_NHET1_GIO;

break;

case 4:

edgeBit = TERMINAL_A3_NHET1_GIO;

break;

case 5:

edgeBit = TERMINAL_J17_NHET1_GIO;

break;

....

default:

break;

}

if (hetREG == hetREG1)

{

edgeCounterValue = edgeGetCounter(hetRAM1, edge);

portValue = gioGetBit(hetPORT1, edgeBit);

}

else

{

edgeCounterValue = edgeGetCounter(hetRAM2, edge);

portValue = gioGetBit(hetPORT2, edgeBit);

}

/* USER CODE END */

}

0 Tammy Noergaard over 8 years ago in reply to Chuck Davenport

Genius 3665 points

Hi Chuck (and Prathap),

So is what you mean take the edge value that is passed in notification.c in the autogenerated code, and whatever pins (terminals) we linked each of the edge triggers to, pass that to the getGIO? i.e.,

void edgeNotification(hetBASE_t * hetREG,uint32 edge)

{

/* enter user code between the USER CODE BEGIN and USER CODE END. */

/* USER CODE BEGIN (37) */

uint32 edgeCounterValue = 0;

uint8 portValue = 0;

uint32 edgeBit = 0;

if(g_printFunction && !edgeNotificationUsed)

{

edgeNotificationUsed = 1;

strcat(g_NOT_buffer, __FUNCTION__);

strcat(g_NOT_buffer, ",\r\n");

}

switch (edge)

{

case 0:

edgeBit = TERMINAL_A13_NHET1_GIO;

break;

case 1:

edgeBit = TERMINAL_A4_NHET1_GIO;

break;

case 2:

edgeBit = TERMINAL_J4_NHET1_GIO;

break;

case 3:

edgeBit = TERMINAL_K19_NHET1_GIO;

break;

case 4:

edgeBit = TERMINAL_A3_NHET1_GIO;

break;

case 5:

edgeBit = TERMINAL_J17_NHET1_GIO;

break;

....

default:

break;

}

if (hetREG == hetREG1)

{

edgeCounterValue = edgeGetCounter(hetRAM1, edge);

portValue = gioGetBit(hetPORT1, edgeBit);

}

else

{

edgeCounterValue = edgeGetCounter(hetRAM2, edge);

portValue = gioGetBit(hetPORT2, edgeBit);

}

/* USER CODE END */

}

0 Chuck Davenport over 8 years ago in reply to Tammy Noergaard

TI__Guru 59540 points

Tammy,

If you look at the code for the gioGetBit function it is:

uint32 gioGetBit(gioPORT_t *port, uint32 bit)
{
/* USER CODE BEGIN (8) */
/* USER CODE END */

return (port->DIN >> bit) & 1U;
}

by passing in the register base address for NHET1 as hetREG1, it is the struct for accessing the HET registers and the function will return the value for the HET channel indicated by the edgebit. In your example there are several things missing for me to give the complete thumbs up to it since there are some defines that I don't know what they are and I don't really know what hetPORT1 and hetPORT2 are. Assuming hetPORT1 and hetPORT2 are the base addresses for each of the instantiations of the NHET hardware on the device and the #defines in the case statements are for the corresponding bit numbers for the HET channels used for the edge detection, then what you have looks good.

Arm-based microcontrollers

Arm-based microcontrollers forum

RM48L942 GIO High (int 9) vs GIO Low (int 23) and Triggering on Both Edges