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TMSls1227 mibspi master recive data error

Other Parts Discussed in Thread: TMS570LS1227

hello TI :

            I want to communicate with TMS570LS1227PEG  in mibspi mode.Then I observe that the master and slave can send and  recive  data through the oscilloscope,but the maser  receive error data. I cannot find the reason, please help me.

I use TMS570   mibspi5  in mibspi mode with interrupt  

master                                       slave

MISO                                           MISO

MOSI                                           MOSI

CLK                                             CLK

CS0                                             CS0

master send data  to  slave , slave   recive   right .   but   slave send data to master is wrong   .  eg:

////////////   slave  recive data  is ok

master ----------send   data :     1    2     3    4   5   6   7    8   9                     ---------------->              1  2   3   4   5   6   7   8  9           recive data    ----slave

                                                 2    3     4    5   6   7   8   9   10                    ----------------->             2   3   4   5   6   7   8  9  10

                                                                ......                                                                                              ......

//////////  master   recive  data  is wrong   :   every time   reciveData[0]  is laster recive  data   ,

slave----------send   data :     1    2     3    4   5   6   7    8   9                     ---------------->               2   3   4   5   6   7   8  9           recive data    ----master

                                             2    3     4    5   6   7   8   9   10                    ----------------->             1   3   4   5   6   7   8  9  10

                                                                ......                                                                                              ......

/// bellow is master mibspi 5 ram  rx  memmory          and , the rx data memmory  should be  003C   003D  003E  003F   .  but    the first  data always  wrong    that is   003B  003C   003F  .     why this happend      I  am  confused ..  please help  me  .

                                                  

  

master code :

slave code:

  • hello TI :

                I want to communicate with TMS570LS1227PEG  in mibspi mode.Then I observe that the master and slave can send and  recive  data through the oscilloscope,but the maser  receive error data. I cannot find the reason, please help me.

    I use TMS570   mibspi5  in mibspi mode with interrupt  

    master                                       slave

    MISO                                           MISO

    MOSI                                           MOSI

    CLK                                             CLK

    CS0                                             CS0

    master send data  to  slave , slave   recive   right .   but   slave send data to master is wrong   .  eg:

    ////////////   slave  recive data  is ok

    master ----------send   data :     1    2     3    4   5   6   7    8   9                     ---------------->              1  2   3   4   5   6   7   8  9           recive data    ----slave

                                                     2    3     4    5   6   7   8   9   10                    ----------------->             2   3   4   5   6   7   8  9  10

                                                                    ......                                                                                              ......

    //////////  master   recive  data  is wrong   :   every time   reciveData[0]  is laster recive  data   ,

    slave----------send   data :     1    2     3    4   5   6   7    8   9                     ---------------->               2   3   4   5   6   7   8  9           recive data    ----master

                                                 2    3     4    5   6   7   8   9   10                    ----------------->             1   3   4   5   6   7   8  9  10

                                                                    ......                                                                                              ......

    /// bellow is master mibspi 5 ram  rx  memmory          and , the rx data memmory  should be  003C   003D  003E  003F   .  but    the first  data always  wrong    that is   003B  003C   003F  .     why this happend      I  am  confused ..  please help  me  .

                                                       

      

    master code :

    slave code:

  • Hello chenliang song,

    I'm looking at the condition explained by you, will get back to you soon.
  • wish your reply ,this problem confuesed me a lot of days.
  • Hi,

    Can you pls clarify a little more on your Set-up ?

    Two different TMS570LS1227 communicating to each other, with 1 being in master and the other being in slave mode ?
  • hello   :

             I  use to TMS570ls1227communication to each other.

           one is master mode, the other is slave mode,   

     HAL  config:

             1.  master HAL config

      

         

           

       

          

        slave HAL config as follows:

        

     

           3. recive interrupt set (master and  slave)

           

          

              and  then  I find slave cannot recive datas ,and I changed slave mibspi.c code as fllows:

                 /* MIBSPI5 set all pins to functional */
                 mibspiREG5->PC0 = (uint32)((uint32)0U << 0U)  /* SCS[0] */
                        | (uint32)((uint32)0U << 1U)  /* SCS[1] */     //    I changed   1--->0
                        | (uint32)((uint32)0U << 2U)  /* SCS[2] */     //   changed 1--->0
                        | (uint32)((uint32)0U << 3U)  /* SCS[3] */     // changed  1->0
                        | (uint32)((uint32)0U << 8U)  /* ENA */
                        | (uint32)((uint32)1U << 9U)  /* CLK */
                        | (uint32)((uint32)1U << 10U)  /* SIMO[0] */
                        | (uint32)((uint32)1U << 11U)  /* SOMI[0] */
                        | (uint32)((uint32)1U << 17U)  /* SIMO[1] */
                        | (uint32)((uint32)1U << 18U)  /* SIMO[2] */
                        | (uint32)((uint32)1U << 19U)  /* SIMO[3] */
                        | (uint32)((uint32)0U << 25U)  /* SOMI[1] */
                        | (uint32)((uint32)0U << 26U)  /* SOMI[2] */
                        | (uint32)((uint32)1U << 27U); /* SOMI[3] */

    1 //master code   
     
    
     // master main
     main()
     {   
    
        uint16 mSendData[16]={0x0000,0x0002,
                           0x003, ...............,0x00F};
         mibspiInit();
        mibspiEnableGroupNotification(mibspiREG5,0,0);
    
    
          while(1) {
              if(time_tick>10ms) //every 100ms  transfer 1 times
              {
                  for(int i=0;i<16;i++)
                     {
                           mSendData[i]++;
                      }
                 mibspiSetData(mibspiREG5,0,mSendData);
                 mibspiTransfer(mibspiREG5,0);
              }
    
         }
      }
    
     //master mode  recive data by interrupt
    
       void mibspiGroupNotification(mibspiBASE_t *mibspi, uint32 group)
       {
    
          uint16 TG3_RX_DATA[20];
          if(group==0)
          {
                mibspiGetData(mibspi,group,TG3_RX_DATA);
    
           }
      
        }
    
    
    2  slave :
    
           uint16 mSendData[16]={0x0000,0x0002,
                           0x003, ...............,0x00F};
            slave main(){
    
                mibspiInit();
                mibspiEnableGroupNotification(mibspiREG5,0,0);
                mibspiSetData(mibspiREG5,0,mSendData);
                mibspiTransfer(mibspiREG5,0);  
                while(1)
                {
                };
    }
    
    
    
     //slave    recive data by interrupt
     void mibspiGroupNotification(mibspiBASE_t *mibspi, uint32 group)
     {
    
               uint16 TG3_RX_DATA[20];
               
               mibspiGetData(mibspi,group,TG3_RX_DATA);
    
                for(int i=0;i<16;i++){
    
                         mSendData[i]++;
                   }
    
                mibspiSetData(mibspiREG5,0,mSendData);
                mibspiTransfer(mibspiREG5,0);   
    
    }
    
    
         

  • Can you pls send across the project ? so that we can have a quick look at it.
  • Chenliang,

    I just want to clarify one point with you.
    In your setup, you have 2 devices. On Device 1, MIBSPI5 is configured as Master, on Device 2, MIBSPI5 is configured as Slave.
    Please can you confirm.
    If this is the case, when MIBSPI is used in slave mode, the CSx lines are used to decode which transfer group has to be used.
    Here is another thread that covers this specific topic.

    e2e.ti.com/.../1012758

    Please have a look and let me know.
  • Hi Chenliang,

    Did you manage to solve this ?

    If not pls share the project so that I can have a quick look at it.

    Another important thing when you are using the CS is the C2TDelay, pls refer to the following thread where you can find more details on the same.
    e2e.ti.com/.../1512637