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RM46 ZWT package B2 and C3 pins

Other Parts Discussed in Thread: RM46L852

Hi,

According to the SPNS185C manual :

B2 pin can be used for : MIBSPI3NCS[2] / I2C_SDA / N2HET1[27] / nTZ2
C3 pin can be used for : MIBSPI3NCS[3] / I2C_SCL / N2HET1[29] / nTZ1

But pin A9 is also used for N2HET1[27] (and this is the unique function on this pin)
and pin A3 is also used for N2HET1[29] (and this is the unique function on this pin)


So there is something I don't understand: how is it possible to use the B2 pin as N2HET1[27] as this function is allocated to the A9 pin?
Same question for C3 and A3 pins.


Thanks for help.

Bruno

  • Hi Bruno,

    Consider the N2HET1[27] as example. This signal has a dedicated terminal A9 on the 337BGA package only and not on the 144QFP package. This is the reason for providing the ability to output/input this signal from more than one terminal.

    So if you are using the 337BGA package it may not make sense to output the N2HET1[27] signal on both A9 and B2 terminals. But the capability is there in case you can think of a use for it. On the 144QFP you can only output the N2HET127] signal on the shared MIBSPI3NCS[2] / I2C_SDA / N2HET1[27] / nTZ2 terminal.

    Regards,
    Sunil
  • Hi Sunil,

    Thanks you for your answer.
    But I find the documentation a little bit confused as the configuration of the pins I give in my first post was extracted from the §4.3.2 of the RM46L852 manual, § which concerns the ZWT package and not the QFP ...
    However, does it means that, if I configure the pinmux to use N2HET1[27] on B2 pin (on the ZWT package), and if I use N2HET1[27] as an output, a write on N2HET1[27] will output the same value on B2 and A9 pins?
    And what is expected, if for the same configuration, i use N2HET1[27] as an input and B2 pin is 0 and A2 pin 1?

    Regards,
    Bruno.
  • Bruno,

    Yes, you can choose to output the same signal on both the terminals.

    There is a mux on the input path to allow you to select between the two terminals. For the N2HET1[27] this input path selection is controlled by PINMMR0[26] and PINMMR25[24]. To get the N2HET1[27] input from the shared terminal B2, PINMMR0[26] must be 1 and PINMMR25[24] must be 0.

    This is described in the I/O Multiplexing Module chapter of the TRM (SPNU514B, pages 237 and 238).

    Regards,
    Sunil