How to delay RM42 microprocessor?

Agustí C

Other Parts Discussed in Thread: HALCOGEN

I am working with a RM42 HDK to generate two PWM signals. Now, my intention is to introduce a delay (approximately 2 us) between these signals but I am not able to do it.

1. I generate the PWM signals through HET pins with HALCoGen

2. I try to delay the generation of the signal through software in CCS:

pwmStart(hetRAM1,pwm0);

for(i=0;i<10000;i++){

//do nothing

}

pwmStart(hetRAM1,pwm1);

3. In the end, no delay is applied and the signals are totally aligned.

I have tried to use RTI counter but the minimum delay is 1ms, so it is not suitable for my application. I think that the signals are aligned since I configure them in HalCoGen and this is why no delay is applied.

Is there any method or solution to solve this problem?

Thanks in advance,

Agustí.

over 8 years ago

0 Anthony F. Seely over 8 years ago

TI__Guru 65600 points

Hi Agustí,

You can definitely generate a delay between PWMs with the N2HET. I'm not 100% sure about doing it through the HalCoGen driver.

A good starting point is the application report: which provides some explanation of the HalCoGen black box N2HET driver.

Also here's a pretty close approximation of the code that's in the black box driver, in a form you should be able to study and or try out in the HET IDE:

PIN_PWM0	.equ	8
INIT_PWM0_D	.equ	432
INIT_PWM0_P	.equ	859
		.asg    "PULSEHI", PWM0_POLARITY
		.asg    "ON", PWM0_ENABLE
		.asg    "OFF", PWM0_D_IRQ
		.asg    "OFF", PWM0_P_IRQ

PIN_PWM1	.equ    10
INIT_PWM1_D	.equ	432
INIT_PWM1_P	.equ	859
		.asg    "PULSEHI", PWM1_POLARITY
		.asg    "ON", PWM1_ENABLE
		.asg    "OFF", PWM1_D_IRQ
		.asg    "OFF", PWM1_P_IRQ

PIN_PWM2        .equ    12
INIT_PWM2_D	.equ	432
INIT_PWM2_P	.equ	859
		.asg    "PULSEHI", PWM2_POLARITY
		.asg    "ON", PWM2_ENABLE
		.asg    "OFF", PWM2_D_IRQ
		.asg    "OFF", PWM2_P_IRQ

PIN_PWM3	.equ    14
INIT_PWM3_D	.equ	432
INIT_PWM3_P	.equ	859
		.asg    "PULSEHI", PWM3_POLARITY
		.asg    "ON", PWM3_ENABLE
		.asg    "OFF", PWM3_D_IRQ
		.asg    "OFF", PWM3_P_IRQ

PIN_PWM4        .equ    16
INIT_PWM4_D	.equ	432
INIT_PWM4_P	.equ	859
		.asg    "PULSEHI", PWM4_POLARITY
		.asg    "ON", PWM4_ENABLE
		.asg    "OFF", PWM4_D_IRQ
		.asg    "OFF", PWM4_P_IRQ

PIN_PWM5	.equ    17
INIT_PWM5_D	.equ	432
INIT_PWM5_P	.equ	859
		.asg    "PULSEHI", PWM5_POLARITY
		.asg    "ON", PWM5_ENABLE
		.asg    "OFF", PWM5_D_IRQ
		.asg    "OFF", PWM5_P_IRQ

PIN_PWM6        .equ    18
INIT_PWM6_D	.equ	432
INIT_PWM6_P	.equ	859
		.asg    "PULSEHI", PWM6_POLARITY
		.asg    "ON", PWM6_ENABLE
		.asg    "OFF", PWM6_D_IRQ
		.asg    "OFF", PWM6_P_IRQ

PIN_PWM7	.equ    19
INIT_PWM7_D	.equ	432
INIT_PWM7_P	.equ	859
		.asg    "PULSEHI", PWM7_POLARITY
		.asg    "ON", PWM7_ENABLE
		.asg    "OFF", PWM7_D_IRQ
		.asg    "OFF", PWM7_P_IRQ

PIN_EDGE0	.equ	9
		.asg	"FALL", EDGE0_POLARITY
		.asg    "OFF",  EDGE0_IRQ

PIN_EDGE1	.equ    11
		.asg	"FALL", EDGE1_POLARITY
		.asg    "OFF",  EDGE1_IRQ

PIN_EDGE2       .equ    13
		.asg	"FALL", EDGE2_POLARITY
		.asg    "OFF",  EDGE2_IRQ

PIN_EDGE3	.equ    15
		.asg	"FALL", EDGE3_POLARITY
		.asg    "OFF",  EDGE3_IRQ

PIN_EDGE4       .equ    20
		.asg	"FALL", EDGE4_POLARITY
		.asg    "OFF",  EDGE4_IRQ

PIN_EDGE5	.equ    21
		.asg	"FALL", EDGE5_POLARITY
		.asg    "OFF",  EDGE5_IRQ

PIN_EDGE6       .equ    22
		.asg	"FALL", EDGE6_POLARITY
		.asg    "OFF",  EDGE6_IRQ

PIN_EDGE7	.equ    23
		.asg	"FALL", EDGE7_POLARITY
		.asg    "OFF",  EDGE7_IRQ

PIN_CAP0	.equ	0
PIN_CAP1	.equ	2
PIN_CAP2	.equ    4
PIN_CAP3	.equ    6
PIN_CAP4	.equ    24
PIN_CAP5	.equ    26
PIN_CAP6	.equ    28
PIN_CAP7	.equ    30

PIN_CAP0_H	.equ	PIN_CAP0 + 1
PIN_CAP1_H	.equ	PIN_CAP1 + 1
PIN_CAP2_H	.equ	PIN_CAP2 + 1
PIN_CAP3_H	.equ	PIN_CAP3 + 1
PIN_CAP4_H	.equ	PIN_CAP4 + 1
PIN_CAP5_H	.equ	PIN_CAP5 + 1
PIN_CAP6_H	.equ	PIN_CAP6 + 1
PIN_CAP7_H	.equ	PIN_CAP7 + 1


START   CNT { reg=T,comp=EQ,max=0x1FFFFFF,data=0x1FFFFFF};

PWM0_D   PWCNT { hr_lr=LOW,en_pin_action=OFF,pin=PIN_PWM0,action=PWM0_POLARITY,reg=NONE,irq=OFF,data=0};
PWM0_P   DJZ { cond_addr=BUF0_D,reg=NONE};

PWM1_D   PWCNT { hr_lr=LOW,en_pin_action=OFF,pin=PIN_PWM1,action=PWM1_POLARITY,,reg=NONE,irq=OFF,data=0};
PWM1_P   DJZ { cond_addr=BUF1_D,reg=NONE};

PWM2_D   PWCNT { hr_lr=LOW,en_pin_action=OFF,pin=PIN_PWM2,action=PWM2_POLARITY,,reg=NONE,irq=OFF,data=0};
PWM2_P   DJZ { cond_addr=BUF2_D,reg=NONE};

PWM3_D   PWCNT { hr_lr=LOW,en_pin_action=OFF,pin=PIN_PWM3,action=PWM3_POLARITY,,reg=NONE,irq=OFF,data=0};
PWM3_P   DJZ { cond_addr=BUF3_D,reg=NONE};

PWM4_D   PWCNT { hr_lr=LOW,en_pin_action=OFF,pin=PIN_PWM4,action=PWM4_POLARITY,,reg=NONE,irq=OFF,data=0};
PWM4_P   DJZ { cond_addr=BUF4_D,reg=NONE};

PWM5_D   PWCNT { hr_lr=LOW,en_pin_action=OFF,pin=PIN_PWM5,action=PWM5_POLARITY,,reg=NONE,irq=OFF,data=0};
PWM5_P   DJZ { cond_addr=BUF5_D,reg=NONE};

PWM6_D   PWCNT { hr_lr=LOW,en_pin_action=OFF,pin=PIN_PWM6,action=PWM6_POLARITY,,reg=NONE,irq=OFF,data=0};
PWM6_P   DJZ { cond_addr=BUF6_D,reg=NONE};

PWM7_D   PWCNT { hr_lr=LOW,en_pin_action=OFF,pin=PIN_PWM7,action=PWM7_POLARITY,,reg=NONE,irq=OFF,data=0};
PWM7_P   DJZ { cond_addr=BUF7_D,reg=NONE};


EDGE0   ECNT { pin=PIN_EDGE0, event=EDGE0_POLARITY,reg=NONE,irq=EDGE0_IRQ,data=0};
EDGE1   ECNT { pin=PIN_EDGE1,event=EDGE1_POLARITY,reg=NONE,irq=EDGE1_IRQ,data=0};
EDGE2   ECNT { pin=PIN_EDGE2,event=EDGE2_POLARITY,reg=NONE,irq=EDGE2_IRQ,data=0};
EDGE3   ECNT { pin=PIN_EDGE3,event=EDGE3_POLARITY,reg=NONE,irq=EDGE3_IRQ,data=0};
EDGE4   ECNT { pin=PIN_EDGE4,event=EDGE4_POLARITY,reg=NONE,irq=EDGE4_IRQ,data=0};
EDGE5   ECNT { pin=PIN_EDGE5,event=EDGE5_POLARITY,reg=NONE,irq=EDGE5_IRQ,data=0};
EDGE6   ECNT { pin=PIN_EDGE6,event=EDGE6_POLARITY,reg=NONE,irq=EDGE6_IRQ,data=0};
EDGE7   ECNT { pin=PIN_EDGE7,event=EDGE7_POLARITY,reg=NONE,irq=EDGE7_IRQ,data=0};


CAP0_D   PCNT { hr_lr=HIGH,type=FALL2RISE,pin=PIN_CAP0};
CAP0_P   PCNT { hr_lr=HIGH,irq=OFF,type=FALL2FALL, pin=PIN_CAP0_H};

CAP1_D   PCNT { hr_lr=HIGH,type=FALL2RISE,pin=PIN_CAP1};
CAP1_P   PCNT { hr_lr=HIGH,irq=OFF,type=FALL2FALL, pin=PIN_CAP1_H};

CAP2_D   PCNT { hr_lr=HIGH,type=FALL2RISE,pin=PIN_CAP2};
CAP2_P   PCNT { hr_lr=HIGH,irq=OFF,type=FALL2FALL, pin=PIN_CAP2_H};

CAP3_D   PCNT { hr_lr=HIGH,type=FALL2RISE,pin=PIN_CAP3};
CAP3_P   PCNT { hr_lr=HIGH,irq=OFF,type=FALL2FALL, pin=PIN_CAP3_H};

CAP4_D   PCNT { hr_lr=HIGH,type=FALL2RISE,pin=PIN_CAP4};
CAP4_P   PCNT { hr_lr=HIGH,irq=OFF,type=FALL2FALL, pin=PIN_CAP4_H};

CAP5_D   PCNT { hr_lr=HIGH,type=FALL2RISE,pin=PIN_CAP5};
CAP5_P   PCNT { hr_lr=HIGH,irq=OFF,type=FALL2FALL, pin=PIN_CAP5_H};

CAP6_D   PCNT { hr_lr=HIGH,type=FALL2RISE,pin=PIN_CAP6};
CAP6_P   PCNT { hr_lr=HIGH,irq=OFF,type=FALL2FALL, pin=PIN_CAP6_H};

CAP7_D   PCNT { hr_lr=HIGH,type=FALL2RISE,pin=PIN_CAP7};
CAP7_P   PCNT { hr_lr=HIGH,irq=OFF,type=FALL2FALL, pin=PIN_CAP7_H, next=TSTMP};

BUF0_D	MOV64 {remote=PWM0_D,comp_mode=ECMP,en_pin_action=PWM0_ENABLE, cond_addr=PWM0_P,pin=PIN_PWM0,action=PWM0_POLARITY,reg=NONE,irq=PWM0_D_IRQ,data=INIT_PWM0_D};
BUF0_P  MOV64 {remote=PWM0_P,comp_mode=ECMP,en_pin_action=OFF,cond_addr=BUF0_D,reg=NONE,irq=PWM0_P_IRQ,data=INIT_PWM0_P,next=PWM1_D};

BUF1_D	MOV64 {remote=PWM1_D,comp_mode=ECMP,en_pin_action=PWM1_ENABLE, cond_addr=PWM1_P,pin=PIN_PWM1,action=PWM1_POLARITY,reg=NONE,irq=PWM1_D_IRQ,data=INIT_PWM1_D};
BUF1_P  MOV64 {remote=PWM1_P,comp_mode=ECMP,en_pin_action=OFF,cond_addr=BUF1_D,reg=NONE,irq=PWM1_P_IRQ,data=INIT_PWM1_P,next=PWM2_D};

BUF2_D	MOV64 {remote=PWM2_D,comp_mode=ECMP,en_pin_action=PWM2_ENABLE, cond_addr=PWM2_P,pin=PIN_PWM2,action=PWM2_POLARITY,reg=NONE,irq=PWM2_D_IRQ,data=INIT_PWM2_D};
BUF2_P  MOV64 {remote=PWM2_P,comp_mode=ECMP,en_pin_action=OFF,cond_addr=BUF2_D,reg=NONE,irq=PWM2_P_IRQ,data=INIT_PWM2_P,next=PWM3_D};

BUF3_D	MOV64 {remote=PWM3_D,comp_mode=ECMP,en_pin_action=PWM3_ENABLE, cond_addr=PWM3_P,pin=PIN_PWM3,action=PWM3_POLARITY,reg=NONE,irq=PWM3_D_IRQ,data=INIT_PWM3_D};
BUF3_P  MOV64 {remote=PWM3_P,comp_mode=ECMP,en_pin_action=OFF,cond_addr=BUF3_D,reg=NONE,irq=PWM3_P_IRQ,data=INIT_PWM3_P,next=PWM4_D};

BUF4_D	MOV64 {remote=PWM4_D,comp_mode=ECMP,en_pin_action=PWM4_ENABLE, cond_addr=PWM4_P,pin=PIN_PWM4,action=PWM4_POLARITY,reg=NONE,irq=PWM4_D_IRQ,data=INIT_PWM4_D};
BUF4_P  MOV64 {remote=PWM4_P,comp_mode=ECMP,en_pin_action=OFF,cond_addr=BUF4_D,reg=NONE,irq=PWM4_P_IRQ,data=INIT_PWM4_P,next=PWM5_D};

BUF5_D	MOV64 {remote=PWM5_D,comp_mode=ECMP,en_pin_action=PWM5_ENABLE, cond_addr=PWM5_P,pin=PIN_PWM5,action=PWM5_POLARITY,reg=NONE,irq=PWM5_D_IRQ,data=INIT_PWM5_D};
BUF5_P  MOV64 {remote=PWM5_P,comp_mode=ECMP,en_pin_action=OFF,cond_addr=BUF5_D,reg=NONE,irq=PWM5_P_IRQ,data=INIT_PWM5_P,next=PWM6_D};

BUF6_D	MOV64 {remote=PWM6_D,comp_mode=ECMP,en_pin_action=PWM6_ENABLE, cond_addr=PWM6_P,pin=PIN_PWM6,action=PWM6_POLARITY,reg=NONE,irq=PWM6_D_IRQ,data=INIT_PWM6_D};
BUF6_P  MOV64 {remote=PWM6_P,comp_mode=ECMP,en_pin_action=OFF,cond_addr=BUF6_D,reg=NONE,irq=PWM6_P_IRQ,data=INIT_PWM6_P,next=PWM7_D};

BUF7_D	MOV64 {remote=PWM7_D,comp_mode=ECMP,en_pin_action=PWM7_ENABLE, cond_addr=PWM7_P,pin=PIN_PWM7,action=PWM7_POLARITY,reg=NONE,irq=PWM7_D_IRQ,data=INIT_PWM7_D};
BUF7_P  MOV64 {remote=PWM7_P,comp_mode=ECMP,en_pin_action=OFF,cond_addr=BUF7_D,reg=NONE,irq=PWM7_P_IRQ,data=INIT_PWM7_P,next=EDGE0};

TSTMP   WCAP { next=START,cond_addr=START,pin=0,event=NOCOND,reg=T,data=0};

PWCNT and DJZ are both decrementing instructions, and they should be able to be run independently of one another.
But I think you need to update both the PWCNT and the DJZ simultaneously to effect a delay like you are trying and the halcogen APIs probalby write to the buffer registers which do synchronized updates. So this is probably why you're having trouble getting the periods to run at a fixed offset.

You can run the code in the HET IDE though and try poking values into the HET RAM to simulate the CPU updating certain locations at various times during the simulation - in order to get the effect you want (you can either manually write a value to the data field, or setup a memory trigger to do the write automatically at a given time.)

Best Regards,

Anthony

-Anthony

0 Agustí C over 8 years ago in reply to Anthony F. Seely

Prodigy 100 points

I finally solved it introducing some data in DJZ instructions.

Thanks a lot,

Agustí.

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How to delay RM42 microprocessor?