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RM4x EMAC DMA memory access are performed in which mode?

Other Parts Discussed in Thread: RM46L852

Hi,

We are using a RM46L852.Our application contains critical code and non critical code.
Critical code is executed in privileged mode, non critical code is executed in user mode.
The MPU is used to prevent non critical code to access to the RAM memory used by the critical code.
In some function of the non critical code, we use DMA transfer and, as explain in §16.2 of SPNU514B, all DMA memory and register
accesses are performed in user mode so there is no risk to overwrite RAM memory used by critical code.
We also used the ethernet controller in non critical code.
My question is: the EMAC acts as DMA master to either internal or external device memory space, but there is no precision about the mode in which EMAC performed memory and register accesses, so in which mode are the accesses performed?

Thanks,

Bruno.