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TMS570, IAR Workbench, running F021 from RAM

Other Parts Discussed in Thread: TMS570LS3137

Hello Texas,

I'm using TMS570LS3137 microcontroller with IAR Embedded Workbench.

I have a bootloader running in Flash Bank0, and the main program in Flash Bank1.

The bootloader's role is to update the main program, which works fine using F021 flash api. (Clear the area, then copy the new program.) But it doesn't work in the other way: The main program cannot operate with the bootloader area, because Flash Bank0 is locked.

I have read all the related topics on this forum, and I figured out that the solution might be loading the F021 functions to RAM, and run them from RAM. Like in this topic:

e2e.ti.com/.../62954

But I have no idea how to write such script in the IAR Workbench's linker syntax: TMS570LS3137.icf

I would like to ask for your help. Could you please provide me an example code on this?

Respect,

Balázs

  • Balázs,


    For this specific question, I will suggest to contact IAR directly and ask them to "translate" the CCS linker command file to their environment.

  • Dear Jean-Marc,

    I have managed to load the F021 objects to RAM, and they run from there, but this doesn't solve my problem. I still cannot operate in Flash Bank0. There must be a different problem here.
    As I mentioned before, my bootloader is running from Bank0, and after finishing its task, it jumps to the main program in Bank1. All the main program code is located in Bank1, so I think I should be able to do flash operations on Bank0 at this point. But the registers tell me that Bank0 is locked.
    Do you have any idea what is the problem here?

    Thank you for answer,
    Balázs
  • Dear Balázs,

    you must copy all Flash API to RAM, by adding this line in your linker file (.icf):

    initialize by copy { object xxxxxxxxx.lib };

    where xxxxxxxxx is the name of your library. For example in TMS470 the library is "pf035a_api_eabi.lib" and the line to add in linekr file is:

    initialize by copy { object pf035a_api_eabi.lib };

    Regards
    Riccardo Capponi
  • Dear Balázs,

    than you must change vetor table offset and after you can jump to the reset handler of application.
    infocenter.arm.com/.../index.jsp

    Regards
    Riccardo Capponi
  • Dear Riccardo,

    I apologize for not answering for this long time. I had some other things to do.

    The general idea is good, thank you. I did the Flash api library replacement just like you said.

    But the vector table offset change: I don't think I can do it by setting the vector table offset bit. Because on TMS570, there are some Power Management Module registers mapped to 0xFFFF0000, so the vector table cannot be placed there, right?

    Do you think there are some other ways to relocate the vector table from Bank0?

    At this point I'm 95% sure that the reason why I cannot operate on Flash Bank0 is the vector table being there. (Please let me know if I'm mistaken in this.) I know it cannot be directly copied to RAM, because there is a linker protection on it. This article shows how to replace it, and gives examples on two different processors:

    www.iar.com/.../

    According to this, the basic steps are:
    1) Make a second vector table which holds the elements of the original vector table. (Since we are unable to move the original vector table directly.)
    Fill the original vector table with dummy handlers.
    2) Add linker script that copies the second vector table to RAM
    3) At startup, remap memory to new vector table. (Find that part of the startup code where the vector table address is set, and modify it.)

    The first two steps can be done easily.
    The 3rd step is not clear for me how it could be done on TMS570. I don't find such part in my startup code.

    Also I'm not sure that this would solve the original problem, unlocking the Flash protection. Because the vector table is still there, even if its vectors don't run from there. What is your opinion on this?

    Thanks,
    Balázs
  • Dear Balázs,


    in Cortex-R5 you can remap the vector table in range 0xFFFF0000-0xFFFF001C by setting the bit V in C1, you can find information in the follow links:

    Kind Regards

    Riccardo Capponi

  • Dear Riccardo,

    There are some Power Control Module Registers on 0xFFFF0000, as I mentioned before. I cannot place the vector table at this location.
    Let me show you this screenshot of the debugger that I just made right now. There is my assembly routine to set the Vector Table Offset, and it works. But when the software jumps to this area it stops working, because you can see on the screenshot there are registers of the TMS570 there.
    Do you have any other suggestions?

    www.dropbox.com/.../0xffff.png

    Anyway, TMS570 controller has a Cortex R4F core, not an R5, but it doesn't make much difference in this case.

    Thank you for patience,
    Balázs
  • So the main question is still this:
    Is there any way to do operations on the FlashBank0 area by F021 on this controller? Or is this always locked since the code starts running from 0x00000000?
  • Hi,

    You can find all information on:

    www.ti.com/.../litabsmultiplefilelist.tsp

    Kind Regards
    Riccardo Capponi
  • Hi,

    Thanks for the example code.
    If I get it right, only one of the three bootloaders in this (the SPI bootloader) makes it possible to update the bootloader itself. The two others are not capable of that.
    In your opinion, what are the factors that make the flash stay unlocked, so the bootloader area can be updated?

    Thanks,
    Balázs
  • Hi All,

    I have done the changes in the linker script for IAR Workbench IDE, but still i am not able to write to bank0 sector 7 location.
    does any one can share the IAR sample project to use F021 API Library for bootloader.

    Thanks,
    Hardik Shah
  • Hi All,

    I have done the changes in the linker script for IAR Workbench IDE, but still i am not able to write to bank0 sector 7 location.
    does any one can share the IAR sample project to use F021 API Library for bootloader.

    Thanks,
    Hardik Shah