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DCAN EERC REC Value

Westin Sykes
Expert 1315 points

Looking at the register values for DCAN ERRC in the RM48 TRM, I see the Receive Error Counter is only 7 bits but claims to go up to 255. Is that including the RP bit to make it effectively 8 bits?

  • 0
    TI__Guru**** 158815 points
    Hi Westin,
    I checked the DCAN internal document we have. The REC is 7 bits and therefore the possible values are 0-127. It is a mistake in the TRM. I will submit a document feedback. Thanks for catching this.
  • 0 in reply to Charles Tsai
    Expert 1315 points

    Could the RP bit not be used as the 8th bit? Shouldn't that bit go high after REC rolls over? Or does REC not roll over to allow that to work?

  • 0 in reply to Westin Sykes
    TI__Guru**** 158815 points

    Hi Westin,

     The RP bit is an indication that the node becomes a passive node. The counters are usually increased faster than they are decreased to be conservative for reliability.  The way the counter works is not necessarily always adding a count of 1 when an error is detected.  There are circumstances when it will add a count of 8, i.e.  when a receiver detects a 'dominant' bit as the first bit after sending an error flag the receive error count will be increase by 8. 

    According to the CAN protocol:

    'After the successful reception of a message (reception without error up to the ACK SLOT and the successful sending of the ACK bit), the RECIVE ERROR COUNT is decreased by 1, if it was between 1 and 127. If the RECEIVE ERROR COUNT was 0, it stays 0, and if it was greater than 127, then it will be set to a value between 119 and 127.'


    So the counter operation is kind of complicated. It does not just count up and roll over when 127 is reached. The counter can count up and down with different count values depending on circumstances.