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Questions about the safety manual TMS570LS31x #2

Other Parts Discussed in Thread: TMS570LS3137-EP

I am reading "Safety Manual for TMS570LS31x and TMS570LS21 x Hercules ARMR-Based Safety Critical Microcontrollers (Literature Number: SPNU511D)".

About "Table 4. Summary of Safety Features and Diagnostics", I want to know the contents of the "Text Execution Time".

Question 1

"Device Dependent see the device-specific data sheet)" it is written to the Ethernet location.
Please tell me the page to which you refer.
(I'm using the TMS570LS3137-EP)

Question 2
"N/A - Fault Avoidance" is written to the Ethernet location.
I do not know the meaning of "Fault Avoidance".
Is it necessary to consider something by the user?

  • Hi Haggy,  

      I think you are refering to the ETH4A/4B, right?  Please refer to the device specific datasheet and look for Table 6-25. PBIST RAM Grouping and in the column associated with the Ethernet it shows the number of cycles to execute PBIST. For LS3137 the number of cycles is 6360 cycles.

      For the fault avoidance you refer to is the ETH5 for Bit multiplexing in Ethernet SRAM. This is a fault avoidance feature during the implemenation of of the SRAM by having N:1 mux factor where N is higher than 1  such that the bits accessed to generate a logical (CPU) word are not physically adjacent. This scheme helps to reduce the probability of physical multi-bit faults resulting in logical multi-bit faults; rather they manifest as multiple single bit faults. 

  • Hi  Charles

    Table 6-25 is a mistake, "Table 6-26. PBIST RAM Grouping" is correct?

    6360 cycles of RAM group 24 I understand.
    Please tell me why that does not contain 133160 cycles of 8700 cycles and RAM group 25 of the RAM group 23.

  • You are right. I missed seeing the group 23 for 8700 cycles and group 25 for 133160 cycles.
  • Hi  Charles.

    I'm sorry, please tell me a little more.

    About "Table 4. Summary of Safety Features and Diagnostics", In addition  I want to know the contents of the "Text Execution Time".

    I have a question about the ID of CPU2A / CPU2B / CPU8A and EFU1 / EFU5.
    About "Device Dependent (see the device-specific data sheet)", please tell me the page to refer to me.

  • There was a mistake in the previous question.
    CPU8A of ID is a mistake. CPU8 is correct.
  • Hi Haggy,

    CPU2A/CPU2B - The LBIST test execution time can be found in Table 6-7 CPU Self-Test Coverage in the datasheet
    CPU8 - The Lockstep Comparator (CCM) selftest test time can be found Table 9-1 and Table 9-2 in the TRM. There are two different CCM selftest, a compare match (positive) test and a compare mismatch (negative) test. The compare match test takes about 4 CPU cycles to complete. The mismatch test test time depends on the number of output signals on the CPU being compared. There may be up to 1000 signals on the CPU being compare so roughly I will say the test time takes about 2000 CPU cycles.
    EFU1- Boot Time Autoload Self Test. The test time is described in the Efuse Controller chapter of the TRM. Specifically it is mentioned in section 32.3.2.5 eFuse ECC Logic Self Test and the test time is 610 VCLK cycles as described in the paragraph.
    EFU5 - this is not a diagnostic but rather a test-of-diagnostic for selftest auto-coverage.
  • Hi Charles.

    Thank you for your immediate answer.

    I understand that EFU5 is not a diagnosis.
    But, in the "Table 4. Summary of Safety Features and Diagnostics" of the safety manual, written with the Device Dependent (see the device-specific data sheet).
    I want to know the information in the data sheet.(I could not be found.)
  • Hi Charles.

    Because there is no your response, I will ask again.

    I understand that EFU5 is not a diagnosis.
    But, in the "Table 4. Summary of Safety Features and Diagnostics" of the safety manual, written with the Device Dependent (see the device-specific data sheet).
    I want to know the information in the data sheet.(I could not be found.)
  • Hi Haggy,
    EFU5 is a test-of-diagnostic for EFU1. I have already shown the test execution time for EFU1. I think you are clear on that. EFU5 is an implied test-of-diagnostic for EFU1. Since EFU5 is an auto-coverage, you don't run it as a separate diagnostic. The test execution time is implied based on the EFU1 test time when the EFU1 is run. Since the test time for EFU1 is listed as 610 VCLK cycles you can imply the same cycles for EFU5.