RM46 bootloader with Flash ECC enabled

Hello!

Strange, _coreDisableFlashEcc_() works for me. I has similar results (0x020004 reads 0xFFFBFFFF) before implement disabling flash ECC Check

This is my code:

bool Flash_Erase_Check(const uint32_t Start_Address, const uint32_t Bytes) {
    register uint32_t *dst1 = (uint32_t *) Start_Address;
    register uint32_t bytes = Bytes;
    bool retcode = true;
#ifdef TMS570
    _coreDisableFlashEcc_();
#endif

    while (bytes > 0) {
        if (*dst1 != 0xFFFFFFFF) {
            LOG_ERROR(SYS, "Erase flash error at 0x%08" PRIX32 ". Data=0x%08" PRIX32, (uint32_t)dst1, *dst1);
            retcode = false;
            break;
        }
        dst1++;
        bytes -= 0x4;
    }
#ifdef TMS570
    _coreEnableFlashEcc_();
#endif
    return retcode;
}

The problem may be that location 0x20000 is in the flash pipeline. (The pipeline mode acts like a very small cache.) To flush the data pipeline, after you disable ECC you can use the flash API function Fapi_flushPipeline().

   volatile uint32_t  u32DummyRead;

   u32DummyRead = *((volatile uint32_t *)0x000U);
   u32DummyRead = *((volatile uint32_t *)0x100U);
   u32DummyRead = *((volatile uint32_t *)0x200U);
   u32DummyRead = *((volatile uint32_t *)0x300U);

The xRM46L852 will be revision B silicon and the errata document is SPNZ200, but I don't think this is related to an erratum. If it fails the erase check, program verify and occasionally a CRC check, I suspect the flash is not erased well. You might want to double check that the device is running at the frequency passed in the call to Fapi_initializeFlashBanks() and that EWAIT is set properly.

You were right, Bob, I wasn't passing in the correct frequency, but there was a reason for that and unfortunately I still haven't got it working.

I had forgotten that I when I first started getting this bootloader going I had problems getting Fapi_initializeFlashBanks() to return success.

I am running the RM46L852 at 160MHz, which (according to the datasheet) should work with 2 data wait state and 0 address wait states, but with those settings Fapi_initializeFlashBanks() returns Fapi_Error_InvalidHclkValue.

I have just tried setting HCLK to run at 80MHz with from 1 to 4 wait states and Fapi_initializeFlashBanks() returns Fapi_Status_Success, but the erase check still fails.

Sounds like a similar problem to this post  

regards,

Charles

It might be worth double checking that LwIP did not put you back in user mode. If that were the case, the ECC disable would not work and that would explain the behavior. (Perhaps you can get a breakpoint in the _coreDisableFlashEcc() routine and check the CPSR for the mode.)

As for erasing with CCS, you can select which sectors to erase in the On-chip Flash section. This snippet is from CCS6:

Hi Bob,
My code was checking to see if there was an application already programmed in Flash by reading the first location (0x20000), but without first disabling ECC. Address 0x20000 was always reading 0xFFFFFFFF if it had been erased so this appeared to work, except that subsequently trying to erase of program the Flash failed.
Of course when I decided to improve the start up check by having it look at a signature value in a header at 0x200020 it generated a data abort if that sector was erased, which made me realise that I need to disable ECC when checking for blank Flash since the ECC will always be invalid when the Flash is blank.
Disabling ECC while doing this startup check fixes the problem and then erasing and programming the Flash works fine.
I guess I was just unlucky that when the Flash at 0x20000 is erased the first word reads 0xFFFFFFFF even with ECC enabled and doesn't seem to generate an ECC error.
I'm not sure why that should cause the subsequent Flash blank check or program verify problems.

Thanks for your help.

regards,
Charles