RM48L952: SPI ENA functionality/documentation problem

First post on this this forum, thanks for your help.

I have a problem trying to setup the ENA pin functionality.

My HW setup is:

• RM48 Evaluation board
• wire connection on read pad 
  • SPI1 CLK <> SPI3 CLK
  • SPI1 SOMI <> SPI3 SOMI
  • SPI1 SIMO <> SPI3 SIMO
  • SPI1 ENA <> SPI3 ENA
  • SPI1  CS0 <> SPI3 CS0

I have a simple project build with halcogen and I'm able to communicate in "Three-Pin Mode" (No care on ENA and CS) using SPI in compatibility mode to transfer one 16-bit word from SPI1 (master) to SPI3 (slave) in polling mode. 

Now I want to do a step forward and use the ENA pin (no care on CS).

I set it as functional in halcogen to both SPI1 and SPI3 and enabled in the data format 0 of SPI1 "wait for enable". Now SPI1 waits for ENA, but SPI3 never pulls down ENA (I see it on oscilloscope) and the communication never takes place, SPI1 never drives the CLK. The master side (SPI1) seems ok because if i turn SPI3 ENA as GPIO and I pull it down manually, the communication takes place.

I even tried to write something in SPI3->DAT0, because I thought that It was waiting to have something ready in TX, but nothing changed.

Do you see anything wrong in my setup? Do you see any pitfall in this layout?

In this foggy situation I have two more doubts on documentation studying the TRM SPNU503B:

• in Table 24-1, in slave mode column it says if SPI ENA enabled "Receives ENA from the external master". My understanding is that in this case ENA is an output in slave mode as said in "24.2.4 Operation with SPIENA". 
• in Table 24-9, in CLKMOD row, it says that for value 1 (and I set 1 for SPI1 to make it master), the SPI ENA is an output. My understanding is that it is an input in this case

Thanks