(CCS 5.5, compiler 5.2.4)
I'm running tough ESM interrupt that report cache errors. This is pretty random throughout my software development once I activate or add some code.
I'm trying to figure out what is going on. Is MPU setting could be the key?
We're working on setting MPU is order to use DMA transfer without interfering with the cache.
I know there are 8 bus masters, one for the DMA, how to configure the bus masters properly? I mean not only for DMA but in order to avoid all of these related problems.
In the user guide, there is this sentence, but that's not talk to me a lot:
« Once user determines the architectural memory partitioning of the IP bus masters on memory system frame according to their application, user should configure the corresponding MPU region for each bus master accordingly. »
Regards.