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CCS/TMS570LS1227: DCAN Polling Send check

user4824430
Prodigy 30 points
Part Number: TMS570LS1227

Tool/software: Code Composer Studio

Hello all:

         I try to send CAN frame without interrupt. according to datasheet, the TXRQX and TXRQ12~TXRQ78 relevant bit will be set.

        and after the frame send out succeed. the relevant bit will be reset.

        but in my project, the frame is correct send out, but during debug I find relevant is not be reset.

        Would you kindly help me. thanks in advance.

Best Regards

Fred

1738.FirstTMS570CAN.rar

  • 0
    TI__Guru**** 186256 points
    Hi，

    The CPU may update the data of the transmit object any time via the IF1/IF2 interface registers, the TxRqst doesn't have to be reset before the update. When NewDat is set together with TxRqst, NewDat will be reset as soon as the new transmission has started.

    After a successful transmission and if no new data was written to the message object (NewDat = ‘0’) since the start of the transmission, the TxRqst bit will be reset. Please check the NewDat bit of the object.

    Regards,
    QJ
  • 0 in reply to QJ Wang
    Prodigy 30 points
    Hi QJ, I got it. that means
    if TxRqst && NewDat both are reset
    means CAN at Idle state.
    if TxRqst && NewDat both are set.
    means CPU request CAN HW send out.
    If NewDat is reset and TxRqst is set
    means CAN HW at Sending state.
    and previous is Sending and now both TxRqst and NewDat are reset,
    means send correct.
    Am I correct.
    Thanks.