Regarding the SPI timing diagrams in the data sheet (SPNS162C, fig 7-15, and others): it seems to me that the behavior shown for Mode 0 (clock polarity = clock phase = 0) does not agree with the industry standard definitions for SPI mode 0. in partilcuar, in mode 0, data is captured on the odd numbered edges, e.g. on the first rising edge. What is shown here is data captured on falling edges. Is this an intentional different standard, or what?