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TMS570LC4357: Quick Question; FreeRTOS + Flash Verification Disabled

Part Number: TMS570LC4357
Other Parts Discussed in Thread: RM57L843

Hello everbody,

I have just registered into E2E. TI because I am trying to flash a piece of SW with FreeRTOS and I have some doubts. I have followed the following tutorial:

And in there it is shown that you have to disable the flash verification. Why is that? Shouldn't it be on? Indeed, if I do not do that, I cannot flash properly.

Also, what does the AUTO ECC generation option do? Does it link your software and decide the ECC addresses at linkage time?

Thank you in advance and kind regards,

Javier Guzman

  • Hello Javier,

    For the TMS570LC4357 and RM57L843 devices, ECC protection of Flash and SRAM memories is always enabled. This differs from Hercules devices in the TMS570LS and RM4 series where ECC is disabled after reset and remains disabled until enabled by software. When the flash is erased (0xFFFFFFFF), the ECC area is also erased (0xFFFFFFFF), so the erased flash is full of ECC errors. If you erase the entire flash, then program your code into the flash (the ECC is also programmed into the corresponding area), but the unused flash will still contain ECC errors.

    The easiest way to avoid this ECC related errors is to use the Linker to generate ECC data rather than the loader.

    1. The linker command file as you did for your project.

    2. The flash loader settings:

    • Unchecked the Auto ECC generation: CCS loader will not generate the ECC.The CCS loader has the ability to calculate the ECC based on your out file, and program the ECC data to the ecc area. 
    • Disable the flash verification: because the data area and ecc area are programmed in separate steps. CCS loader will load the data into flash only, the linker will generate the ECC for the code in the flash.

  • Hello Mr. Wang,

    Thank you very much for your detailed explanation. Indeed your response has helped us to get a better understanding of this platform.

    The only part I have not completely understood is about the flash verification; I mean, in this scenario I am expecting the linker to generate the data for the normal flash memory and for the ECC flash memory section. Then the loader will put everything into the memory. Why do you say they are programmed in separate steps and also the linker will generate the ECC for the code in the flash? Wouldn't it be generated in the build step when the linker is called?

    In addition, I thought the flash verification would just verify that what was written in memory is what it is read. Therefore, even if there are ECC errors it does not matter, as long as you read what you write. Does that make sense?

    Please, could you let us know what we are missing and again thank you very much for your response.

    Kind regards,
    Javier Guzman
  • Hello Javier,

    The flash bank width is 144 bits wide including 128 data bits and 16 ECC bits. In either standard read mode or pipeline read mode, 128 bits data and 16 bits ECC is read at a time.

    If "AUTO ECC Generation" is enabled, the CCS loader will generate 16-bit ECC for every 128-bit data, and program those 144 bits data to flash at a time.

    If using Linker to generate ECC, the ECC data is generated using obj files at link stage and ECC data is placed in out file. When loading data, the loader will program the whole data section first, then ECC section. If the data verification is enabled, the written data (plus 16 bits ECC) will be read back every 128-bit write-operation for verification, but the ECC data has not programmed at this moment. So the ECC error will be generated, and the error pin will set too.

    If there is flash ECC error, the ESM2.3 will be set, and code will enter while(1) look in sys_startup.c
  • Hello Mr. Wang,

    Thank you again for your detailed response. All right, then as I understand, the loader will flash in different steps the data and the ECC data if the ECC data was generated by the linker.Therefore that triggers the ECC error that ends up in a infinite loop. All that makes sense and I think that so far I do not have more questions :)

    Thank you very much for your help and kind regards,
    Javier Guzman