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TMS570LS1224: clocks using PLL1 as source have OSCIN frequency

Part Number: TMS570LS1224

I have configured a TMS570LS1224-based LaunchPad XL2 for a PLL1 frequency of 80 MHz. Most clocks in the system use PLL1 as a source, but after initialization they still all are 16Mhz, the frequency of the external oscillator. PLL1 is enabled, and its valid bit is set CSVSTAT. Any of oscillator clock, GLK, RTI base, VCLKA1, VCLKA2, VCLKA4 routed to  ECLK through CLKTEST show 16 MHz, but PLL1 out put is 80 MHz as intended. Using other clock sources (e.g. HF LPO) shows the frequency of the selected clock source on ECLK.

Thanks and Best Regards,

Daniel Marmier

  • Check to see if a PLL slip was detected? (FBSLIP is bit 9 and RFSLIP is bit 8 of the GLBSTAT register at address 0xFFFFFFEC.) The default is to use OSC as the PLL clock when a PLL slip occurs. Changing the PLL frequency without first disabling the PLL can cause a PLL slip.